Search

Bernarr E. Gregory

Examiner (ID: 16577)

Most Active Art Unit
3648
Art Unit(s)
3642, 3646, 2202, 3662, 3648, 2766
Total Applications
4684
Issued Applications
4115
Pending Applications
277
Abandoned Applications
314

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4480923 [patent_doc_number] => 07869300 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-01-11 [patent_title] => 'Memory device control for self-refresh mode' [patent_app_type] => utility [patent_app_number] => 12/431876 [patent_app_country] => US [patent_app_date] => 2009-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2007 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/869/07869300.pdf [firstpage_image] =>[orig_patent_app_number] => 12431876 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/431876
Memory device control for self-refresh mode Apr 28, 2009 Issued
Array ( [id] => 6426291 [patent_doc_number] => 20100277986 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-11-04 [patent_title] => 'NON-VOLATILE FIELD PROGRAMMABLE GATE ARRAY' [patent_app_type] => utility [patent_app_number] => 12/432214 [patent_app_country] => US [patent_app_date] => 2009-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5129 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0277/20100277986.pdf [firstpage_image] =>[orig_patent_app_number] => 12432214 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/432214
Non-volatile field programmable gate array Apr 28, 2009 Issued
Array ( [id] => 4474526 [patent_doc_number] => 07944724 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-05-17 [patent_title] => 'Ternary content addressable memory having reduced leakage effects' [patent_app_type] => utility [patent_app_number] => 12/431332 [patent_app_country] => US [patent_app_date] => 2009-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 4963 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/944/07944724.pdf [firstpage_image] =>[orig_patent_app_number] => 12431332 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/431332
Ternary content addressable memory having reduced leakage effects Apr 27, 2009 Issued
Array ( [id] => 5366226 [patent_doc_number] => 20090303785 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-10 [patent_title] => 'PHASE CHANGE MEMORY DEVICES AND READ METHODS USING ELAPSED TIME-BASED READ VOLTAGES' [patent_app_type] => utility [patent_app_number] => 12/431292 [patent_app_country] => US [patent_app_date] => 2009-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 12247 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0303/20090303785.pdf [firstpage_image] =>[orig_patent_app_number] => 12431292 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/431292
Phase change memory devices and read methods using elapsed time-based read voltages Apr 27, 2009 Issued
Array ( [id] => 6280827 [patent_doc_number] => 20100257317 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-10-07 [patent_title] => 'Virtual Barrier Synchronization Cache' [patent_app_type] => utility [patent_app_number] => 12/419364 [patent_app_country] => US [patent_app_date] => 2009-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7043 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0257/20100257317.pdf [firstpage_image] =>[orig_patent_app_number] => 12419364 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/419364
Virtual barrier synchronization cache Apr 6, 2009 Issued
Array ( [id] => 5390356 [patent_doc_number] => 20090207669 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-20 [patent_title] => 'PAGE BUFFER CIRCUIT OF MEMORY DEVICE AND PROGRAM METHOD' [patent_app_type] => utility [patent_app_number] => 12/419955 [patent_app_country] => US [patent_app_date] => 2009-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5118 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0207/20090207669.pdf [firstpage_image] =>[orig_patent_app_number] => 12419955 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/419955
Page buffer circuit of memory device and program method Apr 6, 2009 Issued
Array ( [id] => 6280824 [patent_doc_number] => 20100257316 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-10-07 [patent_title] => 'Virtual Barrier Synchronization Cache Castout Election' [patent_app_type] => utility [patent_app_number] => 12/419343 [patent_app_country] => US [patent_app_date] => 2009-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7043 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0257/20100257316.pdf [firstpage_image] =>[orig_patent_app_number] => 12419343 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/419343
Virtual barrier synchronization cache castout election Apr 6, 2009 Issued
Array ( [id] => 5526034 [patent_doc_number] => 20090196111 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-06 [patent_title] => 'PAGE BUFFER CIRCUIT OF MEMORY DEVICE AND PROGRAM METHOD' [patent_app_type] => utility [patent_app_number] => 12/419974 [patent_app_country] => US [patent_app_date] => 2009-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5117 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0196/20090196111.pdf [firstpage_image] =>[orig_patent_app_number] => 12419974 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/419974
Page buffer circuit of memory device and program method Apr 6, 2009 Issued
Array ( [id] => 5526022 [patent_doc_number] => 20090196099 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-06 [patent_title] => 'PAGE BUFFER CIRCUIT OF MEMORY DEVICE AND PROGRAM METHOD' [patent_app_type] => utility [patent_app_number] => 12/419967 [patent_app_country] => US [patent_app_date] => 2009-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5118 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0196/20090196099.pdf [firstpage_image] =>[orig_patent_app_number] => 12419967 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/419967
Page buffer circuit of memory device and program method Apr 6, 2009 Issued
Array ( [id] => 4581105 [patent_doc_number] => 07855919 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-12-21 [patent_title] => 'Non-volatile memory and semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/407539 [patent_app_country] => US [patent_app_date] => 2009-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 38 [patent_no_of_words] => 15316 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/855/07855919.pdf [firstpage_image] =>[orig_patent_app_number] => 12407539 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/407539
Non-volatile memory and semiconductor device Mar 18, 2009 Issued
Array ( [id] => 5405557 [patent_doc_number] => 20090240872 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-09-24 [patent_title] => 'MEMORY DEVICE WITH MULTIPLE-ACCURACY READ COMMANDS' [patent_app_type] => utility [patent_app_number] => 12/405275 [patent_app_country] => US [patent_app_date] => 2009-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 7510 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0240/20090240872.pdf [firstpage_image] =>[orig_patent_app_number] => 12405275 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/405275
Memory device with multiple-accuracy read commands Mar 16, 2009 Issued
Array ( [id] => 7528757 [patent_doc_number] => 08045360 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-10-25 [patent_title] => 'Semiconductor device having single-ended sensing amplifier' [patent_app_type] => utility [patent_app_number] => 12/382495 [patent_app_country] => US [patent_app_date] => 2009-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 8450 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/045/08045360.pdf [firstpage_image] =>[orig_patent_app_number] => 12382495 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/382495
Semiconductor device having single-ended sensing amplifier Mar 16, 2009 Issued
Array ( [id] => 5437864 [patent_doc_number] => 20090172451 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-02 [patent_title] => 'METHOD AND COMPUTER PROGRAM FOR CONTROLLING A STORAGE DEVICE HAVING PER-ELEMENT SELECTABLE POWER SUPPLY VOLTAGES' [patent_app_type] => utility [patent_app_number] => 12/399551 [patent_app_country] => US [patent_app_date] => 2009-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4151 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0172/20090172451.pdf [firstpage_image] =>[orig_patent_app_number] => 12399551 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/399551
Method and computer program for controlling a storage device having per-element selectable power supply voltages Mar 5, 2009 Issued
Array ( [id] => 6491903 [patent_doc_number] => 20100214859 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-26 [patent_title] => 'Implementing Boosted Wordline Voltage in Memories' [patent_app_type] => utility [patent_app_number] => 12/389420 [patent_app_country] => US [patent_app_date] => 2009-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2361 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0214/20100214859.pdf [firstpage_image] =>[orig_patent_app_number] => 12389420 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/389420
Implementing boosted wordline voltage in memories Feb 19, 2009 Issued
Array ( [id] => 4506966 [patent_doc_number] => 07920424 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-04-05 [patent_title] => 'Scalable electrically eraseable and programmable memory (EEPROM) cell array' [patent_app_type] => utility [patent_app_number] => 12/389972 [patent_app_country] => US [patent_app_date] => 2009-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 5293 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/920/07920424.pdf [firstpage_image] =>[orig_patent_app_number] => 12389972 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/389972
Scalable electrically eraseable and programmable memory (EEPROM) cell array Feb 19, 2009 Issued
Array ( [id] => 5513359 [patent_doc_number] => 20090213665 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-27 [patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/389738 [patent_app_country] => US [patent_app_date] => 2009-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3034 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0213/20090213665.pdf [firstpage_image] =>[orig_patent_app_number] => 12389738 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/389738
Nonvolatile semiconductor memory device Feb 19, 2009 Issued
Array ( [id] => 5532120 [patent_doc_number] => 20090231908 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-09-17 [patent_title] => 'SEMICONDUCTOR STORAGE DEVICE AND OPERATION METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 12/389836 [patent_app_country] => US [patent_app_date] => 2009-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 7122 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0231/20090231908.pdf [firstpage_image] =>[orig_patent_app_number] => 12389836 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/389836
Semiconductor storage device and operation method thereof Feb 19, 2009 Issued
Array ( [id] => 4625567 [patent_doc_number] => 08004873 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-08-23 [patent_title] => 'Resistance change memory device' [patent_app_type] => utility [patent_app_number] => 12/389606 [patent_app_country] => US [patent_app_date] => 2009-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 37 [patent_no_of_words] => 15126 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/004/08004873.pdf [firstpage_image] =>[orig_patent_app_number] => 12389606 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/389606
Resistance change memory device Feb 19, 2009 Issued
Array ( [id] => 5513347 [patent_doc_number] => 20090213653 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-27 [patent_title] => 'PROGRAMMING OF ANALOG MEMORY CELLS USING A SINGLE PROGRAMMING PULSE PER STATE TRANSITION' [patent_app_type] => utility [patent_app_number] => 12/388528 [patent_app_country] => US [patent_app_date] => 2009-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5799 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0213/20090213653.pdf [firstpage_image] =>[orig_patent_app_number] => 12388528 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/388528
Programming of analog memory cells using a single programming pulse per state transition Feb 18, 2009 Issued
Array ( [id] => 4615348 [patent_doc_number] => 07990795 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-08-02 [patent_title] => 'Dynamic random access memory (DRAM) refresh' [patent_app_type] => utility [patent_app_number] => 12/388922 [patent_app_country] => US [patent_app_date] => 2009-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3251 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/990/07990795.pdf [firstpage_image] =>[orig_patent_app_number] => 12388922 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/388922
Dynamic random access memory (DRAM) refresh Feb 18, 2009 Issued
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