Search

Bernarr E. Gregory

Examiner (ID: 11710, Phone: (571)272-6972 , Office: P/3648 )

Most Active Art Unit
3648
Art Unit(s)
2202, 3646, 3648, 3642, 2766, 3662
Total Applications
4661
Issued Applications
4105
Pending Applications
272
Abandoned Applications
314

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1520756 [patent_doc_number] => 06413874 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-02 [patent_title] => 'Method and apparatus for etching a semiconductor article and method of preparing a semiconductor article by using the same' [patent_app_type] => B1 [patent_app_number] => 09/217130 [patent_app_country] => US [patent_app_date] => 1998-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 26 [patent_no_of_words] => 19451 [patent_no_of_claims] => 82 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/413/06413874.pdf [firstpage_image] =>[orig_patent_app_number] => 09217130 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/217130
Method and apparatus for etching a semiconductor article and method of preparing a semiconductor article by using the same Dec 20, 1998 Issued
Array ( [id] => 4176725 [patent_doc_number] => 06140689 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-31 [patent_title] => 'Micromechanical sensor' [patent_app_type] => 1 [patent_app_number] => 9/202837 [patent_app_country] => US [patent_app_date] => 1998-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2471 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/140/06140689.pdf [firstpage_image] =>[orig_patent_app_number] => 202837 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/202837
Micromechanical sensor Dec 20, 1998 Issued
Array ( [id] => 4131337 [patent_doc_number] => 06146968 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-14 [patent_title] => 'Method for forming a crown capacitor' [patent_app_type] => 1 [patent_app_number] => 9/209047 [patent_app_country] => US [patent_app_date] => 1998-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 1768 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 261 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/146/06146968.pdf [firstpage_image] =>[orig_patent_app_number] => 209047 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/209047
Method for forming a crown capacitor Dec 8, 1998 Issued
Array ( [id] => 4419563 [patent_doc_number] => 06177326 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-23 [patent_title] => 'Method to form bottom electrode of capacitor' [patent_app_type] => 1 [patent_app_number] => 9/208607 [patent_app_country] => US [patent_app_date] => 1998-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 1515 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/177/06177326.pdf [firstpage_image] =>[orig_patent_app_number] => 208607 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/208607
Method to form bottom electrode of capacitor Dec 7, 1998 Issued
Array ( [id] => 4152235 [patent_doc_number] => 06124182 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-26 [patent_title] => 'Method of forming stacked capacitor' [patent_app_type] => 1 [patent_app_number] => 9/206807 [patent_app_country] => US [patent_app_date] => 1998-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 1677 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/124/06124182.pdf [firstpage_image] =>[orig_patent_app_number] => 206807 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/206807
Method of forming stacked capacitor Dec 6, 1998 Issued
Array ( [id] => 1497100 [patent_doc_number] => 06404039 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-11 [patent_title] => 'Semiconductor device with intrinsic base diffusion layer, extrinsic base diffusion layer, and common base diffusion' [patent_app_type] => B1 [patent_app_number] => 09/206320 [patent_app_country] => US [patent_app_date] => 1998-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 16 [patent_no_of_words] => 3877 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/404/06404039.pdf [firstpage_image] =>[orig_patent_app_number] => 09206320 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/206320
Semiconductor device with intrinsic base diffusion layer, extrinsic base diffusion layer, and common base diffusion Dec 6, 1998 Issued
Array ( [id] => 1361276 [patent_doc_number] => 06569710 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-27 [patent_title] => 'Panel structure with plurality of chip compartments for providing high volume of chip modules' [patent_app_type] => B1 [patent_app_number] => 09/205407 [patent_app_country] => US [patent_app_date] => 1998-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 14 [patent_no_of_words] => 4428 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/569/06569710.pdf [firstpage_image] =>[orig_patent_app_number] => 09205407 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/205407
Panel structure with plurality of chip compartments for providing high volume of chip modules Dec 2, 1998 Issued
Array ( [id] => 4359018 [patent_doc_number] => 06169009 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-02 [patent_title] => 'Methods of etching platinum group metal film and forming lower electrode of capacitor' [patent_app_type] => 1 [patent_app_number] => 9/203337 [patent_app_country] => US [patent_app_date] => 1998-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 3551 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 257 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/169/06169009.pdf [firstpage_image] =>[orig_patent_app_number] => 203337 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/203337
Methods of etching platinum group metal film and forming lower electrode of capacitor Dec 1, 1998 Issued
Array ( [id] => 4237208 [patent_doc_number] => 06090679 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-18 [patent_title] => 'Method for forming a crown capacitor' [patent_app_type] => 1 [patent_app_number] => 9/201280 [patent_app_country] => US [patent_app_date] => 1998-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 1707 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/090/06090679.pdf [firstpage_image] =>[orig_patent_app_number] => 201280 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/201280
Method for forming a crown capacitor Nov 29, 1998 Issued
Array ( [id] => 1494853 [patent_doc_number] => 06403422 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-06-11 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => B2 [patent_app_number] => 09/197567 [patent_app_country] => US [patent_app_date] => 1998-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 19 [patent_no_of_words] => 4223 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 232 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/403/06403422.pdf [firstpage_image] =>[orig_patent_app_number] => 09197567 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/197567
Semiconductor device and method of manufacturing the same Nov 22, 1998 Issued
Array ( [id] => 4094878 [patent_doc_number] => 06096620 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-01 [patent_title] => 'Method of fabricating dynamic random access memory capacitor' [patent_app_type] => 1 [patent_app_number] => 9/191490 [patent_app_country] => US [patent_app_date] => 1998-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 2553 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 256 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/096/06096620.pdf [firstpage_image] =>[orig_patent_app_number] => 191490 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/191490
Method of fabricating dynamic random access memory capacitor Nov 12, 1998 Issued
Array ( [id] => 4131415 [patent_doc_number] => 06121109 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-19 [patent_title] => 'Method of forming hemispherical grain polysilicon over lower electrode capacitor' [patent_app_type] => 1 [patent_app_number] => 9/191327 [patent_app_country] => US [patent_app_date] => 1998-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 2788 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/121/06121109.pdf [firstpage_image] =>[orig_patent_app_number] => 191327 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/191327
Method of forming hemispherical grain polysilicon over lower electrode capacitor Nov 12, 1998 Issued
Array ( [id] => 4408476 [patent_doc_number] => 06300213 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-09 [patent_title] => 'Semiconductor processing methods of forming a storage node of a capacitor' [patent_app_type] => 1 [patent_app_number] => 9/189030 [patent_app_country] => US [patent_app_date] => 1998-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 24 [patent_no_of_words] => 4254 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/300/06300213.pdf [firstpage_image] =>[orig_patent_app_number] => 189030 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/189030
Semiconductor processing methods of forming a storage node of a capacitor Nov 8, 1998 Issued
Array ( [id] => 4169253 [patent_doc_number] => 06140198 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-31 [patent_title] => 'Method of fabricating load resistor' [patent_app_type] => 1 [patent_app_number] => 9/187620 [patent_app_country] => US [patent_app_date] => 1998-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 29 [patent_no_of_words] => 3698 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/140/06140198.pdf [firstpage_image] =>[orig_patent_app_number] => 187620 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/187620
Method of fabricating load resistor Nov 5, 1998 Issued
Array ( [id] => 4406280 [patent_doc_number] => 06171951 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-09 [patent_title] => 'Dual damascene method comprising ion implanting to densify dielectric layer and forming a hard mask layer with a tapered opening' [patent_app_type] => 1 [patent_app_number] => 9/183530 [patent_app_country] => US [patent_app_date] => 1998-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 2106 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/171/06171951.pdf [firstpage_image] =>[orig_patent_app_number] => 183530 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/183530
Dual damascene method comprising ion implanting to densify dielectric layer and forming a hard mask layer with a tapered opening Oct 29, 1998 Issued
Array ( [id] => 4131552 [patent_doc_number] => 06146981 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-14 [patent_title] => 'Method of manufacturing buried contact in SRAM' [patent_app_type] => 1 [patent_app_number] => 9/183447 [patent_app_country] => US [patent_app_date] => 1998-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 2473 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 289 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/146/06146981.pdf [firstpage_image] =>[orig_patent_app_number] => 183447 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/183447
Method of manufacturing buried contact in SRAM Oct 29, 1998 Issued
Array ( [id] => 4087429 [patent_doc_number] => 06133130 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-17 [patent_title] => 'Method for fabricating an embedded dynamic random access memory using self-aligned silicide technology' [patent_app_type] => 1 [patent_app_number] => 9/181530 [patent_app_country] => US [patent_app_date] => 1998-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 3371 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/133/06133130.pdf [firstpage_image] =>[orig_patent_app_number] => 181530 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/181530
Method for fabricating an embedded dynamic random access memory using self-aligned silicide technology Oct 27, 1998 Issued
Array ( [id] => 6269666 [patent_doc_number] => 20020105069 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-08 [patent_title] => 'SEMICONDUCTOR DEVICE INCLUDING STUD BUMPS AS EXTERNAL CONNECTION TERMINALS' [patent_app_type] => new [patent_app_number] => 09/170260 [patent_app_country] => US [patent_app_date] => 1998-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 16070 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 29 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0105/20020105069.pdf [firstpage_image] =>[orig_patent_app_number] => 09170260 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/170260
Semiconductor device including stud bumps as external connection terminals Oct 12, 1998 Issued
Array ( [id] => 4303078 [patent_doc_number] => 06187672 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-13 [patent_title] => 'Interconnect with low dielectric constant insulators for semiconductor integrated circuit manufacturing' [patent_app_type] => 1 [patent_app_number] => 9/158337 [patent_app_country] => US [patent_app_date] => 1998-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 39 [patent_no_of_words] => 6022 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/187/06187672.pdf [firstpage_image] =>[orig_patent_app_number] => 158337 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/158337
Interconnect with low dielectric constant insulators for semiconductor integrated circuit manufacturing Sep 21, 1998 Issued
Array ( [id] => 1594734 [patent_doc_number] => 06383951 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-07 [patent_title] => 'Low dielectric constant material for integrated circuit fabrication' [patent_app_type] => B1 [patent_app_number] => 09/146397 [patent_app_country] => US [patent_app_date] => 1998-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 17 [patent_no_of_words] => 5650 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/383/06383951.pdf [firstpage_image] =>[orig_patent_app_number] => 09146397 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/146397
Low dielectric constant material for integrated circuit fabrication Sep 2, 1998 Issued
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