Betsy Lee Deppe

Array ( [id] => 3987771 [patent_doc_number] => 05905766 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-05-18 [patent_title] => 'Synchronizer, method and system for transferring data' [patent_app_type] => 1 [patent_app_number] => 8/625740 [patent_app_country] => US [patent_app_date] => 1996-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 5254 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/905/05905766.pdf [firstpage_image] =>[orig_patent_app_number] => 625740 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3675443 [patent_doc_number] => 05668838 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-16 [patent_title] => 'Instantaneous phase detecting circuit and clock recovery signal generating circuit incorporated in differential demodulator' [patent_app_type] => 1 [patent_app_number] => 8/621646 [patent_app_country] => US [patent_app_date] => 1996-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 53 [patent_no_of_words] => 16092 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/668/05668838.pdf [firstpage_image] =>[orig_patent_app_number] => 621646 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3875554 [patent_doc_number] => 05796814 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-18 [patent_title] => 'Digital transmission system comprising a receiver with cascaded equalizers' [patent_app_type] => 1 [patent_app_number] => 8/618933 [patent_app_country] => US [patent_app_date] => 1996-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 16 [patent_no_of_words] => 4209 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/796/05796814.pdf [firstpage_image] =>[orig_patent_app_number] => 618933 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3853071 [patent_doc_number] => 05708686 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-01-13 [patent_title] => 'Method for receiver-side clock recovery for digital signals' [patent_app_type] => 1 [patent_app_number] => 8/618437 [patent_app_country] => US [patent_app_date] => 1996-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2898 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/708/05708686.pdf [firstpage_image] =>[orig_patent_app_number] => 618437 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3823336 [patent_doc_number] => 05710796 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-01-20 [patent_title] => 'Method and receiver for determining a phase error in a radio-frequency signal' [patent_app_type] => 1 [patent_app_number] => 8/557178 [patent_app_country] => US [patent_app_date] => 1996-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2690 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/710/05710796.pdf [firstpage_image] =>[orig_patent_app_number] => 557178 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3660504 [patent_doc_number] => 05684837 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-11-04 [patent_title] => 'Adjustable digital FSK demodulator' [patent_app_type] => 1 [patent_app_number] => 8/611539 [patent_app_country] => US [patent_app_date] => 1996-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 32 [patent_no_of_words] => 5127 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/684/05684837.pdf [firstpage_image] =>[orig_patent_app_number] => 611539 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3875852 [patent_doc_number] => 05793810 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-11 [patent_title] => 'Method of bypassing vocoders in digital mobile communication system' [patent_app_type] => 1 [patent_app_number] => 8/611257 [patent_app_country] => US [patent_app_date] => 1996-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2221 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/793/05793810.pdf [firstpage_image] =>[orig_patent_app_number] => 611257 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3827098 [patent_doc_number] => 05812619 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-22 [patent_title] => 'Digital phase lock loop and system for digital clock recovery' [patent_app_type] => 1 [patent_app_number] => 8/608165 [patent_app_country] => US [patent_app_date] => 1996-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4231 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/812/05812619.pdf [firstpage_image] =>[orig_patent_app_number] => 608165 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3982203 [patent_doc_number] => 05887037 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-23 [patent_title] => 'Introducing processing delay as a multiple of the time slot duration' [patent_app_type] => 1 [patent_app_number] => 8/606777 [patent_app_country] => US [patent_app_date] => 1996-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 3202 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/887/05887037.pdf [firstpage_image] =>[orig_patent_app_number] => 606777 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3952431 [patent_doc_number] => 05930305 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-27 [patent_title] => 'Signal demodulation and diversity combining in a communications system using orthogonal modulation' [patent_app_type] => 1 [patent_app_number] => 8/606240 [patent_app_country] => US [patent_app_date] => 1996-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4522 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/930/05930305.pdf [firstpage_image] =>[orig_patent_app_number] => 606240 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3705328 [patent_doc_number] => 05680421 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-10-21 [patent_title] => 'Frame synchronization apparatus' [patent_app_type] => 1 [patent_app_number] => 8/604832 [patent_app_country] => US [patent_app_date] => 1996-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 6422 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/680/05680421.pdf [firstpage_image] =>[orig_patent_app_number] => 604832 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4028760 [patent_doc_number] => 05881108 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-09 [patent_title] => 'Adaptive pre-equalizer for use in data communications equipment' [patent_app_type] => 1 [patent_app_number] => 8/605404 [patent_app_country] => US [patent_app_date] => 1996-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 4071 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/881/05881108.pdf [firstpage_image] =>[orig_patent_app_number] => 605404 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3644940 [patent_doc_number] => 05631933 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-05-20 [patent_title] => 'Phase-locked digital synthesizers' [patent_app_type] => 1 [patent_app_number] => 8/604231 [patent_app_country] => US [patent_app_date] => 1996-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 1691 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/631/05631933.pdf [firstpage_image] =>[orig_patent_app_number] => 604231 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3875878 [patent_doc_number] => 05793812 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-11 [patent_title] => 'Line driver circuit for redundant timing signal generators' [patent_app_type] => 1 [patent_app_number] => 8/603618 [patent_app_country] => US [patent_app_date] => 1996-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2104 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/793/05793812.pdf [firstpage_image] =>[orig_patent_app_number] => 603618 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3674416 [patent_doc_number] => 05657464 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-12 [patent_title] => 'Data transfer circuit for use with a base unit or a handset of a telephone system' [patent_app_type] => 1 [patent_app_number] => 8/598945 [patent_app_country] => US [patent_app_date] => 1996-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4161 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/657/05657464.pdf [firstpage_image] =>[orig_patent_app_number] => 598945 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3753443 [patent_doc_number] => 05787126 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-28 [patent_title] => 'Detector and receiving and transmitting apparatus' [patent_app_type] => 1 [patent_app_number] => 8/597708 [patent_app_country] => US [patent_app_date] => 1996-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 59 [patent_figures_cnt] => 63 [patent_no_of_words] => 12507 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/787/05787126.pdf [firstpage_image] =>[orig_patent_app_number] => 597708 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3669204 [patent_doc_number] => 05627862 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-05-06 [patent_title] => 'Apparatus for demodulating phase modulated WAVE' [patent_app_type] => 1 [patent_app_number] => 8/597612 [patent_app_country] => US [patent_app_date] => 1996-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 4337 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/627/05627862.pdf [firstpage_image] =>[orig_patent_app_number] => 597612 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4074832 [patent_doc_number] => 05896426 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-20 [patent_title] => 'Programmable synchronization character' [patent_app_type] => 1 [patent_app_number] => 8/596978 [patent_app_country] => US [patent_app_date] => 1996-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2313 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/896/05896426.pdf [firstpage_image] =>[orig_patent_app_number] => 596978 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3692442 [patent_doc_number] => 05633899 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-05-27 [patent_title] => 'Phase locked loop for high speed data capture of a serial data stream' [patent_app_type] => 1 [patent_app_number] => 8/596006 [patent_app_country] => US [patent_app_date] => 1996-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 6003 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/633/05633899.pdf [firstpage_image] =>[orig_patent_app_number] => 596006 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3630716 [patent_doc_number] => 05642387 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-06-24 [patent_title] => 'Bit synchronization method and circuit' [patent_app_type] => 1 [patent_app_number] => 8/597512 [patent_app_country] => US [patent_app_date] => 1996-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6835 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/642/05642387.pdf [firstpage_image] =>[orig_patent_app_number] => 597512 [rel_patent_id] =>[rel_patent_doc_number] =>)