Search

Bhavesh M. Mehta

Supervisory Patent Examiner (ID: 15292, Phone: (571)272-7453 , Office: P/2665 )

Most Active Art Unit
2721
Art Unit(s)
2621, 2624, 2606, 2714, 2616, 2611, 2625, 2656, 2721, 2665
Total Applications
656
Issued Applications
507
Pending Applications
40
Abandoned Applications
109

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 12234944 [patent_doc_number] => 20180067807 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-08 [patent_title] => 'STANDARD AND NON-STANDARD DISPERSED STORAGE NETWORK DATA ACCESS' [patent_app_type] => utility [patent_app_number] => 15/257001 [patent_app_country] => US [patent_app_date] => 2016-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8507 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15257001 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/257001
Standard and non-standard dispersed storage network data access Sep 5, 2016 Issued
Array ( [id] => 14523475 [patent_doc_number] => 10338999 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-02 [patent_title] => Confirming memory marks indicating an error in computer memory [patent_app_type] => utility [patent_app_number] => 15/255415 [patent_app_country] => US [patent_app_date] => 2016-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6304 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15255415 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/255415
Confirming memory marks indicating an error in computer memory Sep 1, 2016 Issued
Array ( [id] => 14921795 [patent_doc_number] => 10432232 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-01 [patent_title] => Multi-type parity bit generation for encoding and decoding [patent_app_type] => utility [patent_app_number] => 15/252753 [patent_app_country] => US [patent_app_date] => 2016-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 21 [patent_no_of_words] => 19303 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15252753 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/252753
Multi-type parity bit generation for encoding and decoding Aug 30, 2016 Issued
Array ( [id] => 12221809 [patent_doc_number] => 20180060169 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-01 [patent_title] => 'MULTIPLE NODE REPAIR USING HIGH RATE MINIMUM STORAGE REGENERATION ERASURE CODE' [patent_app_type] => utility [patent_app_number] => 15/248047 [patent_app_country] => US [patent_app_date] => 2016-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8938 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15248047 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/248047
Multiple node repair using high rate minimum storage regeneration erasure code Aug 25, 2016 Issued
Array ( [id] => 15197981 [patent_doc_number] => 10496484 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-03 [patent_title] => Methods and apparatus for error detection for data storage devices [patent_app_type] => utility [patent_app_number] => 15/229886 [patent_app_country] => US [patent_app_date] => 2016-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 12172 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15229886 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/229886
Methods and apparatus for error detection for data storage devices Aug 4, 2016 Issued
Array ( [id] => 14708581 [patent_doc_number] => 10382060 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-13 [patent_title] => On-line self-checking hamming encoder, decoder and associated method [patent_app_type] => utility [patent_app_number] => 15/229591 [patent_app_country] => US [patent_app_date] => 2016-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3581 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15229591 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/229591
On-line self-checking hamming encoder, decoder and associated method Aug 4, 2016 Issued
Array ( [id] => 11825552 [patent_doc_number] => 20170214489 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-07-27 [patent_title] => 'PROTOCOL LAYER PACKET CODING FOR TRANSMITTER/RECEIVER BUFFER OPTIMIZATION' [patent_app_type] => utility [patent_app_number] => 15/228291 [patent_app_country] => US [patent_app_date] => 2016-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 17997 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15228291 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/228291
Protocol layer packet coding for transmitter/receiver buffer optimization Aug 3, 2016 Issued
Array ( [id] => 14206677 [patent_doc_number] => 10270471 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-23 [patent_title] => Memory system having ECC self-checking function and associated method [patent_app_type] => utility [patent_app_number] => 15/226139 [patent_app_country] => US [patent_app_date] => 2016-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3821 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15226139 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/226139
Memory system having ECC self-checking function and associated method Aug 1, 2016 Issued
Array ( [id] => 13161151 [patent_doc_number] => 10097313 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-09 [patent_title] => Backchannel protocol for link training and adaptation [patent_app_type] => utility [patent_app_number] => 15/226545 [patent_app_country] => US [patent_app_date] => 2016-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9141 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15226545 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/226545
Backchannel protocol for link training and adaptation Aug 1, 2016 Issued
Array ( [id] => 11600611 [patent_doc_number] => 09647796 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-09 [patent_title] => 'Channel coding method of variable length information using block code' [patent_app_type] => utility [patent_app_number] => 15/170794 [patent_app_country] => US [patent_app_date] => 2016-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 16986 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15170794 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/170794
Channel coding method of variable length information using block code May 31, 2016 Issued
Array ( [id] => 11080188 [patent_doc_number] => 20160277153 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-22 [patent_title] => 'METHOD AND APPARATUS FOR PACKET RETRANSMISSION IN DSL SYSTEMS' [patent_app_type] => utility [patent_app_number] => 15/166950 [patent_app_country] => US [patent_app_date] => 2016-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4328 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15166950 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/166950
METHOD AND APPARATUS FOR PACKET RETRANSMISSION IN DSL SYSTEMS May 26, 2016 Abandoned
Array ( [id] => 11072180 [patent_doc_number] => 20160269144 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-15 [patent_title] => 'ADAPTIVE DATA INTERFERENCE CANCELLATION' [patent_app_type] => utility [patent_app_number] => 15/158094 [patent_app_country] => US [patent_app_date] => 2016-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 18850 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15158094 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/158094
ADAPTIVE DATA INTERFERENCE CANCELLATION May 17, 2016 Abandoned
Array ( [id] => 13860169 [patent_doc_number] => 10191804 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-01-29 [patent_title] => Updating reliability data [patent_app_type] => utility [patent_app_number] => 15/157042 [patent_app_country] => US [patent_app_date] => 2016-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 7142 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15157042 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/157042
Updating reliability data May 16, 2016 Issued
Array ( [id] => 11064360 [patent_doc_number] => 20160261322 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-08 [patent_title] => 'METHOD FOR GENERATING BINARY CODES FOR UNEQUAL ERROR PROTECTION OF INPUT VALUES' [patent_app_type] => utility [patent_app_number] => 15/155281 [patent_app_country] => US [patent_app_date] => 2016-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8868 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15155281 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/155281
Encoding channel quality indicator and precoding control information bits May 15, 2016 Issued
Array ( [id] => 11723530 [patent_doc_number] => 09696379 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-07-04 [patent_title] => 'Three-dimensional processing system having at least one layer with circuitry dedicated to scan testing and system state checkpointing of other system layers' [patent_app_type] => utility [patent_app_number] => 15/084553 [patent_app_country] => US [patent_app_date] => 2016-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 41 [patent_figures_cnt] => 52 [patent_no_of_words] => 30057 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 459 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15084553 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/084553
Three-dimensional processing system having at least one layer with circuitry dedicated to scan testing and system state checkpointing of other system layers Mar 29, 2016 Issued
Array ( [id] => 11903469 [patent_doc_number] => 09772903 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-09-26 [patent_title] => 'Resilient register file circuit for dynamic variation tolerance and method of operating the same' [patent_app_type] => utility [patent_app_number] => 15/083122 [patent_app_country] => US [patent_app_date] => 2016-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6061 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15083122 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/083122
Resilient register file circuit for dynamic variation tolerance and method of operating the same Mar 27, 2016 Issued
Array ( [id] => 14557725 [patent_doc_number] => 10347330 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-09 [patent_title] => Solid state storage device and reading control method thereof for read retry process with optimal read voltage set [patent_app_type] => utility [patent_app_number] => 15/013023 [patent_app_country] => US [patent_app_date] => 2016-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 7420 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15013023 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/013023
Solid state storage device and reading control method thereof for read retry process with optimal read voltage set Feb 1, 2016 Issued
Array ( [id] => 13133237 [patent_doc_number] => 10084567 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-09-25 [patent_title] => Early termination in enhanced multimedia broadcast-multicast service reception [patent_app_type] => utility [patent_app_number] => 15/011939 [patent_app_country] => US [patent_app_date] => 2016-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 12284 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15011939 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/011939
Early termination in enhanced multimedia broadcast-multicast service reception Jan 31, 2016 Issued
Array ( [id] => 12955609 [patent_doc_number] => 09838036 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-12-05 [patent_title] => Decoder, minimum value selection circuit, and minimum value selection method [patent_app_type] => utility [patent_app_number] => 15/011709 [patent_app_country] => US [patent_app_date] => 2016-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 45 [patent_figures_cnt] => 54 [patent_no_of_words] => 17922 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15011709 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/011709
Decoder, minimum value selection circuit, and minimum value selection method Jan 31, 2016 Issued
Array ( [id] => 11027452 [patent_doc_number] => 20160224408 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-04 [patent_title] => 'REWRITING FLASH MEMORIES BY MESSAGE PASSING' [patent_app_type] => utility [patent_app_number] => 15/011537 [patent_app_country] => US [patent_app_date] => 2016-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 10893 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15011537 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/011537
Rewriting flash memories by message passing Jan 29, 2016 Issued
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