Search

Bhavesh M. Mehta

Supervisory Patent Examiner (ID: 15292, Phone: (571)272-7453 , Office: P/2665 )

Most Active Art Unit
2721
Art Unit(s)
2621, 2624, 2606, 2714, 2616, 2611, 2625, 2656, 2721, 2665
Total Applications
656
Issued Applications
507
Pending Applications
40
Abandoned Applications
109

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11600618 [patent_doc_number] => 09647803 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-09 [patent_title] => 'Cooperative communication system with adaptive packet retransmission strategy' [patent_app_type] => utility [patent_app_number] => 14/220376 [patent_app_country] => US [patent_app_date] => 2014-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 7685 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 632 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14220376 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/220376
Cooperative communication system with adaptive packet retransmission strategy Mar 19, 2014 Issued
Array ( [id] => 11891778 [patent_doc_number] => 09762351 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-09-12 [patent_title] => 'Statistics adaptive soft decision forward error correction in digital communication' [patent_app_type] => utility [patent_app_number] => 14/220049 [patent_app_country] => US [patent_app_date] => 2014-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3586 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14220049 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/220049
Statistics adaptive soft decision forward error correction in digital communication Mar 18, 2014 Issued
Array ( [id] => 10236173 [patent_doc_number] => 20150121168 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-04-30 [patent_title] => 'MEMORY SYSTEM INCLUDING RANDOMIZER AND DE-RANDOMIZER' [patent_app_type] => utility [patent_app_number] => 14/219775 [patent_app_country] => US [patent_app_date] => 2014-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6057 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14219775 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/219775
MEMORY SYSTEM INCLUDING RANDOMIZER AND DE-RANDOMIZER Mar 18, 2014 Abandoned
Array ( [id] => 14334461 [patent_doc_number] => 10298263 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-21 [patent_title] => Refresh, run, aggregate decoder recovery [patent_app_type] => utility [patent_app_number] => 14/218626 [patent_app_country] => US [patent_app_date] => 2014-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 9476 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14218626 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/218626
Refresh, run, aggregate decoder recovery Mar 17, 2014 Issued
Array ( [id] => 11552321 [patent_doc_number] => 09621188 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-04-11 [patent_title] => 'Soft and hard decision message-passing decoding' [patent_app_type] => utility [patent_app_number] => 14/215659 [patent_app_country] => US [patent_app_date] => 2014-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9135 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14215659 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/215659
Soft and hard decision message-passing decoding Mar 16, 2014 Issued
Array ( [id] => 9746109 [patent_doc_number] => 20140281828 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'SYSTEM AND METHOD FOR ACCUMULATING SOFT INFORMATION IN LDPC DECODING' [patent_app_type] => utility [patent_app_number] => 14/210971 [patent_app_country] => US [patent_app_date] => 2014-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 10796 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14210971 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/210971
System and method for accumulating soft information in LDPC decoding Mar 13, 2014 Issued
Array ( [id] => 12569283 [patent_doc_number] => 10018675 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-07-10 [patent_title] => Testing an integrated circuit in user mode using partial reconfiguration [patent_app_type] => utility [patent_app_number] => 14/212160 [patent_app_country] => US [patent_app_date] => 2014-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4169 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14212160 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/212160
Testing an integrated circuit in user mode using partial reconfiguration Mar 13, 2014 Issued
Array ( [id] => 9746056 [patent_doc_number] => 20140281775 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'System on a Chip FPGA Spatial Debugging Using Single Snapshot' [patent_app_type] => utility [patent_app_number] => 14/212508 [patent_app_country] => US [patent_app_date] => 2014-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9037 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14212508 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/212508
System on a chip FPGA spatial debugging using single snapshot Mar 13, 2014 Issued
Array ( [id] => 11740931 [patent_doc_number] => 09705532 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-07-11 [patent_title] => 'Parallel low-density parity check (LDPC) accumulation' [patent_app_type] => utility [patent_app_number] => 14/207459 [patent_app_country] => US [patent_app_date] => 2014-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3529 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14207459 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/207459
Parallel low-density parity check (LDPC) accumulation Mar 11, 2014 Issued
Array ( [id] => 9912241 [patent_doc_number] => 20150067444 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-03-05 [patent_title] => 'SEMICONDUCTOR STORAGE DEVICE AND MEMORY SYSTEM' [patent_app_type] => utility [patent_app_number] => 14/203473 [patent_app_country] => US [patent_app_date] => 2014-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6761 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14203473 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/203473
SEMICONDUCTOR STORAGE DEVICE AND MEMORY SYSTEM Mar 9, 2014 Abandoned
Array ( [id] => 9746107 [patent_doc_number] => 20140281826 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'ERROR CORRECTION METHOD AND MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/202215 [patent_app_country] => US [patent_app_date] => 2014-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3587 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14202215 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/202215
Error correction method and memory device capable of reading pages continuously Mar 9, 2014 Issued
Array ( [id] => 9688323 [patent_doc_number] => 20140245088 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-08-28 [patent_title] => 'SEMICONDUCTOR TEST DEVICE AND SEMICONDUCTOR TEST METHOD' [patent_app_type] => utility [patent_app_number] => 14/192307 [patent_app_country] => US [patent_app_date] => 2014-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2860 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14192307 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/192307
SEMICONDUCTOR TEST DEVICE AND SEMICONDUCTOR TEST METHOD Feb 26, 2014 Abandoned
Array ( [id] => 10351718 [patent_doc_number] => 20150236723 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-20 [patent_title] => 'Parallel VLSI architectures for constrained turbo block convolutional decoding' [patent_app_type] => utility [patent_app_number] => 13/999376 [patent_app_country] => US [patent_app_date] => 2014-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 34820 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13999376 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/999376
Parallel VLSI architectures for constrained turbo block convolutional decoding Feb 18, 2014 Abandoned
Array ( [id] => 9540236 [patent_doc_number] => 20140164883 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-12 [patent_title] => 'OPTICAL TRANSMISSION MODULE AND OPTICAL SIGNAL TRANSMISSION APPARATUS' [patent_app_type] => utility [patent_app_number] => 14/182639 [patent_app_country] => US [patent_app_date] => 2014-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6662 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14182639 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/182639
OPTICAL TRANSMISSION MODULE AND OPTICAL SIGNAL TRANSMISSION APPARATUS Feb 17, 2014 Abandoned
Array ( [id] => 10473016 [patent_doc_number] => 20150358032 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-10 [patent_title] => 'DATA PROCESSING DEVICE AND DATA PROCESSING METHOD' [patent_app_type] => utility [patent_app_number] => 14/760622 [patent_app_country] => US [patent_app_date] => 2014-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 131 [patent_figures_cnt] => 131 [patent_no_of_words] => 47791 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14760622 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/760622
DATA PROCESSING DEVICE AND DATA PROCESSING METHOD Jan 26, 2014 Abandoned
Array ( [id] => 10885610 [patent_doc_number] => 08910013 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-12-09 [patent_title] => 'Methods and apparatus for providing multi-layered coding for memory devices' [patent_app_type] => utility [patent_app_number] => 14/136101 [patent_app_country] => US [patent_app_date] => 2013-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7333 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14136101 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/136101
Methods and apparatus for providing multi-layered coding for memory devices Dec 19, 2013 Issued
Array ( [id] => 9372584 [patent_doc_number] => 20140082457 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-20 [patent_title] => 'ERROR CORRECTING FOR IMPROVING RELIABILITY BY COMBINATION OF STORAGE SYSTEM AND FLASH MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/087018 [patent_app_country] => US [patent_app_date] => 2013-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 8271 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14087018 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/087018
Error correcting for improving reliability by combination of storage system and flash memory device Nov 21, 2013 Issued
Array ( [id] => 11764976 [patent_doc_number] => 09373416 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-06-21 [patent_title] => 'Method and system for testing a memory' [patent_app_type] => utility [patent_app_number] => 14/066602 [patent_app_country] => US [patent_app_date] => 2013-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7252 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14066602 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/066602
Method and system for testing a memory Oct 28, 2013 Issued
Array ( [id] => 9329473 [patent_doc_number] => 20140056255 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-27 [patent_title] => 'METHOD AND APPARATUS FOR INDICATING A TEMPORARY BLOCK FLOW TO WHICH A PIGGYBACKED ACK/NACK FIELD IS ADDRESSED' [patent_app_type] => utility [patent_app_number] => 14/065794 [patent_app_country] => US [patent_app_date] => 2013-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4947 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14065794 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/065794
METHOD AND APPARATUS FOR INDICATING A TEMPORARY BLOCK FLOW TO WHICH A PIGGYBACKED ACK/NACK FIELD IS ADDRESSED Oct 28, 2013 Abandoned
Array ( [id] => 9297052 [patent_doc_number] => 20140040686 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-06 [patent_title] => 'TESTING METHOD AND SEMICONDUCTOR INTEGRATED CIRCUIT TO WHICH THE SAME METHOD IS APPLIED' [patent_app_type] => utility [patent_app_number] => 14/047055 [patent_app_country] => US [patent_app_date] => 2013-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 13434 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14047055 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/047055
TESTING METHOD AND SEMICONDUCTOR INTEGRATED CIRCUIT TO WHICH THE SAME METHOD IS APPLIED Oct 6, 2013 Abandoned
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