Search

Bibi Sharidan Carrillo

Examiner (ID: 17276)

Most Active Art Unit
1711
Art Unit(s)
1751, 1809, 1743, 1754, 1792, 1711, 1313, 1746
Total Applications
1922
Issued Applications
1240
Pending Applications
175
Abandoned Applications
536

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 13785687 [patent_doc_number] => 20190006382 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-03 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/045183 [patent_app_country] => US [patent_app_date] => 2018-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18624 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16045183 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/045183
SEMICONDUCTOR DEVICE Jul 24, 2018 Abandoned
Array ( [id] => 18277217 [patent_doc_number] => 11616167 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-28 [patent_title] => Nitride semiconductor light-emitting element and method for manufacturing nitride semiconductor light-emitting element [patent_app_type] => utility [patent_app_number] => 16/647072 [patent_app_country] => US [patent_app_date] => 2018-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4190 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 245 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16647072 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/647072
Nitride semiconductor light-emitting element and method for manufacturing nitride semiconductor light-emitting element Jul 19, 2018 Issued
Array ( [id] => 13878865 [patent_doc_number] => 20190035773 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-31 [patent_title] => DUAL-SIDED DISPLAY AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 16/039518 [patent_app_country] => US [patent_app_date] => 2018-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13960 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16039518 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/039518
Dual-sided display and method for fabricating the same Jul 18, 2018 Issued
Array ( [id] => 13879261 [patent_doc_number] => 20190035971 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-31 [patent_title] => METHOD OF MANUFACTURING DRIVEN ELEMENT CHIP, DRIVEN ELEMENT CHIP, EXPOSING DEVICE, AND IMAGE FORMING APPARATUS [patent_app_type] => utility [patent_app_number] => 16/039417 [patent_app_country] => US [patent_app_date] => 2018-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 23184 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16039417 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/039417
Method of manufacturing driven element chip, driven element chip, exposing device, and image forming apparatus Jul 18, 2018 Issued
Array ( [id] => 15300137 [patent_doc_number] => 20190393204 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-26 [patent_title] => Eliminating defects in stacks [patent_app_type] => utility [patent_app_number] => 16/014371 [patent_app_country] => US [patent_app_date] => 2018-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4270 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16014371 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/014371
Eliminating defects in stacks Jun 20, 2018 Abandoned
Array ( [id] => 13740543 [patent_doc_number] => 20180374741 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-27 [patent_title] => Method for Forming an Alignment Mark [patent_app_type] => utility [patent_app_number] => 16/014506 [patent_app_country] => US [patent_app_date] => 2018-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8080 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16014506 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/014506
Method for forming an alignment mark Jun 20, 2018 Issued
Array ( [id] => 13499929 [patent_doc_number] => 20180301507 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-18 [patent_title] => SIDEWALL INSULATED RESISTIVE MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 16/009075 [patent_app_country] => US [patent_app_date] => 2018-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7356 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16009075 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/009075
Sidewall insulated resistive memory devices Jun 13, 2018 Issued
Array ( [id] => 13613511 [patent_doc_number] => 20180358305 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-13 [patent_title] => WAFER LEVEL PACKAGE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 15/992376 [patent_app_country] => US [patent_app_date] => 2018-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4445 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15992376 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/992376
WAFER LEVEL PACKAGE AND MANUFACTURING METHOD THEREOF May 29, 2018 Abandoned
Array ( [id] => 13847871 [patent_doc_number] => 20190027420 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-24 [patent_title] => ELECTRONICS DEVICE HAVING AT LEAST ONE COMPONENT TO BE COOLED [patent_app_type] => utility [patent_app_number] => 15/992469 [patent_app_country] => US [patent_app_date] => 2018-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3299 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15992469 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/992469
Electronics device having at least one component to be cooled May 29, 2018 Issued
Array ( [id] => 13785381 [patent_doc_number] => 20190006229 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-03 [patent_title] => PRODUCTION OF SEMICONDUCTOR REGIONS IN AN ELECTRONIC CHIP [patent_app_type] => utility [patent_app_number] => 15/992481 [patent_app_country] => US [patent_app_date] => 2018-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3853 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15992481 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/992481
Production of semiconductor regions in an electronic chip May 29, 2018 Issued
Array ( [id] => 14938533 [patent_doc_number] => 20190304905 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-03 [patent_title] => CO-PLACEMENT OF RESISTOR AND OTHER DEVICES TO IMPROVE AREA & PERFORMANCE [patent_app_type] => utility [patent_app_number] => 15/992473 [patent_app_country] => US [patent_app_date] => 2018-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4583 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15992473 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/992473
CO-PLACEMENT OF RESISTOR AND OTHER DEVICES TO IMPROVE AREA & PERFORMANCE May 29, 2018 Abandoned
Array ( [id] => 16575029 [patent_doc_number] => 10896957 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-19 [patent_title] => Semiconductor devices [patent_app_type] => utility [patent_app_number] => 15/992401 [patent_app_country] => US [patent_app_date] => 2018-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 28 [patent_no_of_words] => 9955 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15992401 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/992401
Semiconductor devices May 29, 2018 Issued
Array ( [id] => 13598991 [patent_doc_number] => 20180351044 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-06 [patent_title] => LIGHT EMITTING DIODE [patent_app_type] => utility [patent_app_number] => 15/990958 [patent_app_country] => US [patent_app_date] => 2018-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8639 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15990958 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/990958
Light emitting diode May 28, 2018 Issued
Array ( [id] => 13599019 [patent_doc_number] => 20180351058 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-06 [patent_title] => OPTOELECTRONIC COMPONENT AND METHOD OF PRODUCING AN OPTOELECTRONIC COMPONENT [patent_app_type] => utility [patent_app_number] => 15/991271 [patent_app_country] => US [patent_app_date] => 2018-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2874 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15991271 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/991271
OPTOELECTRONIC COMPONENT AND METHOD OF PRODUCING AN OPTOELECTRONIC COMPONENT May 28, 2018 Abandoned
Array ( [id] => 14955567 [patent_doc_number] => 10439064 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-10-08 [patent_title] => Dual port vertical transistor memory cell [patent_app_type] => utility [patent_app_number] => 15/990956 [patent_app_country] => US [patent_app_date] => 2018-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4028 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15990956 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/990956
Dual port vertical transistor memory cell May 28, 2018 Issued
Array ( [id] => 14382417 [patent_doc_number] => 20190165121 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-30 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 15/990949 [patent_app_country] => US [patent_app_date] => 2018-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9854 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15990949 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/990949
Semiconductor device and method for fabricating the same May 28, 2018 Issued
Array ( [id] => 13435137 [patent_doc_number] => 20180269111 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-09-20 [patent_title] => TRANSISTOR CHANNEL [patent_app_type] => utility [patent_app_number] => 15/982033 [patent_app_country] => US [patent_app_date] => 2018-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5717 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15982033 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/982033
Transistor channel May 16, 2018 Issued
Array ( [id] => 15045831 [patent_doc_number] => 20190333920 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-31 [patent_title] => METHOD FOR INTEGRATING MEMORY AND LOGIC [patent_app_type] => utility [patent_app_number] => 15/964702 [patent_app_country] => US [patent_app_date] => 2018-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18670 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15964702 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/964702
Method for forming an integrated circuit and an integrated circuit Apr 26, 2018 Issued
Array ( [id] => 14317667 [patent_doc_number] => 20190148537 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-16 [patent_title] => FIN FIELD EFFECT TRANSISTOR (FINFET) DEVICE STRUCTURE WITH ISOLATION LAYER AND METHOD FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 15/964742 [patent_app_country] => US [patent_app_date] => 2018-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7543 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15964742 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/964742
Fin field effect transistor (FinFET) device structure with isolation layer and method for forming the same Apr 26, 2018 Issued
Array ( [id] => 13543485 [patent_doc_number] => 20180323289 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-08 [patent_title] => SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 15/964738 [patent_app_country] => US [patent_app_date] => 2018-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4926 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15964738 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/964738
Semiconductor device and fabrication method thereof Apr 26, 2018 Issued
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