
Bilkis Jahan
Examiner (ID: 16855, Phone: (571)270-5022 , Office: P/2817 )
| Most Active Art Unit | 2817 |
| Art Unit(s) | 2817, 2809, 2896, 2814, 2816, 4122 |
| Total Applications | 1200 |
| Issued Applications | 1021 |
| Pending Applications | 107 |
| Abandoned Applications | 118 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 17130473
[patent_doc_number] => 20210305242
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-09-30
[patent_title] => POWER DEVICE INCLUDING LATERAL INSULATED GATE BIPOLAR TRANSISTOR (LIGBT) AND MANUFACTURING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 17/142154
[patent_app_country] => US
[patent_app_date] => 2021-01-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9248
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 182
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17142154
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/142154 | Power device including lateral insulated gate bipolar transistor (LIGBT) and manufacturing method thereof | Jan 4, 2021 | Issued |
Array
(
[id] => 16850856
[patent_doc_number] => 20210151601
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-05-20
[patent_title] => NANOSHEET TRANSISTORS WITH STRAINED CHANNEL REGIONS
[patent_app_type] => utility
[patent_app_number] => 17/136185
[patent_app_country] => US
[patent_app_date] => 2020-12-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7472
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17136185
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/136185 | Nanosheet transistors with strained channel regions | Dec 28, 2020 | Issued |
Array
(
[id] => 18951003
[patent_doc_number] => 11894309
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-02-06
[patent_title] => System on integrated chips (SoIC) and semiconductor structures with integrated SoIC
[patent_app_type] => utility
[patent_app_number] => 17/121140
[patent_app_country] => US
[patent_app_date] => 2020-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 43
[patent_figures_cnt] => 57
[patent_no_of_words] => 12985
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17121140
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/121140 | System on integrated chips (SoIC) and semiconductor structures with integrated SoIC | Dec 13, 2020 | Issued |
Array
(
[id] => 16731476
[patent_doc_number] => 20210098624
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-04-01
[patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/117080
[patent_app_country] => US
[patent_app_date] => 2020-12-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3871
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17117080
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/117080 | Semiconductor device and method of fabricating the same | Dec 8, 2020 | Issued |
Array
(
[id] => 17993365
[patent_doc_number] => 20220359402
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-11-10
[patent_title] => ARRAY SUBSTRATE, LIGHT-EMITTING SUBSTRATE AND DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/611801
[patent_app_country] => US
[patent_app_date] => 2020-12-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15610
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17611801
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/611801 | Array substrate, light-emitting substrate and display device | Dec 7, 2020 | Issued |
Array
(
[id] => 16781753
[patent_doc_number] => 20210118832
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-04-22
[patent_title] => Bonding Structure of Dies with Dangling Bonds
[patent_app_type] => utility
[patent_app_number] => 17/113357
[patent_app_country] => US
[patent_app_date] => 2020-12-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7089
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17113357
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/113357 | Bonding structure of dies with dangling bonds | Dec 6, 2020 | Issued |
Array
(
[id] => 19919762
[patent_doc_number] => 12295158
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-05-06
[patent_title] => Silicon carbide semiconductor device
[patent_app_type] => utility
[patent_app_number] => 17/755235
[patent_app_country] => US
[patent_app_date] => 2020-11-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 35
[patent_figures_cnt] => 35
[patent_no_of_words] => 7027
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 305
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17755235
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/755235 | Silicon carbide semiconductor device | Nov 19, 2020 | Issued |
Array
(
[id] => 18721584
[patent_doc_number] => 11798941
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-10-24
[patent_title] => Semiconductor device having an upper epitaxial layer contacting two lower epitaxial layers
[patent_app_type] => utility
[patent_app_number] => 17/099636
[patent_app_country] => US
[patent_app_date] => 2020-11-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 42
[patent_no_of_words] => 8507
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17099636
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/099636 | Semiconductor device having an upper epitaxial layer contacting two lower epitaxial layers | Nov 15, 2020 | Issued |
Array
(
[id] => 17615525
[patent_doc_number] => 20220157805
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-05-19
[patent_title] => SEMICONDUCTOR CHIP, SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/097870
[patent_app_country] => US
[patent_app_date] => 2020-11-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5163
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -7
[patent_words_short_claim] => 144
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17097870
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/097870 | Semiconductor chip, semiconductor device and manufacturing method of semiconductor device | Nov 12, 2020 | Issued |
Array
(
[id] => 16858614
[patent_doc_number] => 20210159359
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-05-27
[patent_title] => METHOD FOR FORMING A COMMON ELECTRODE OF A PLURALITY OF OPTOELECTRONIC DEVICES
[patent_app_type] => utility
[patent_app_number] => 17/097639
[patent_app_country] => US
[patent_app_date] => 2020-11-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3793
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17097639
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/097639 | Method for forming a common electrode of a plurality of optoelectronic devices | Nov 12, 2020 | Issued |
Array
(
[id] => 17886845
[patent_doc_number] => 20220302323
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-09-22
[patent_title] => SEMICONDUCTOR INTEGRATED CIRCUIT
[patent_app_type] => utility
[patent_app_number] => 17/771134
[patent_app_country] => US
[patent_app_date] => 2020-10-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3618
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -4
[patent_words_short_claim] => 106
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17771134
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/771134 | Semiconductor integrated circuit | Oct 26, 2020 | Issued |
Array
(
[id] => 16796279
[patent_doc_number] => 20210126096
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-04-29
[patent_title] => INTEGRATED CIRCUIT
[patent_app_type] => utility
[patent_app_number] => 17/077579
[patent_app_country] => US
[patent_app_date] => 2020-10-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9110
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 140
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17077579
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/077579 | Integrated circuit | Oct 21, 2020 | Issued |
Array
(
[id] => 19016363
[patent_doc_number] => 11923305
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-03-05
[patent_title] => Methods of forming apparatuses having tungsten-containing structures
[patent_app_type] => utility
[patent_app_number] => 17/076658
[patent_app_country] => US
[patent_app_date] => 2020-10-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 14
[patent_no_of_words] => 3990
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 56
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17076658
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/076658 | Methods of forming apparatuses having tungsten-containing structures | Oct 20, 2020 | Issued |
Array
(
[id] => 18061999
[patent_doc_number] => 20220393086
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-12-08
[patent_title] => DISPLAY DEVICE AND METHOD FOR MANUFACTURING SAME
[patent_app_type] => utility
[patent_app_number] => 17/774978
[patent_app_country] => US
[patent_app_date] => 2020-10-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 31028
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 149
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17774978
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/774978 | Display device and method for manufacturing same | Oct 18, 2020 | Issued |
Array
(
[id] => 16601846
[patent_doc_number] => 20210028377
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-01-28
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/071378
[patent_app_country] => US
[patent_app_date] => 2020-10-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9759
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -4
[patent_words_short_claim] => 165
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17071378
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/071378 | Semiconductor device having multiple semiconductor layers | Oct 14, 2020 | Issued |
Array
(
[id] => 17901048
[patent_doc_number] => 20220310710
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-09-29
[patent_title] => PIXEL ARRAY AND DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/439861
[patent_app_country] => US
[patent_app_date] => 2020-09-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 16793
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17439861
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/439861 | Pixel array and display device | Sep 28, 2020 | Issued |
Array
(
[id] => 18402218
[patent_doc_number] => 11664368
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-05-30
[patent_title] => Low capacitance transient voltage suppressor including a punch-through silicon controlled rectifier as low-side steering diode
[patent_app_type] => utility
[patent_app_number] => 17/032900
[patent_app_country] => US
[patent_app_date] => 2020-09-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 17
[patent_no_of_words] => 8118
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 226
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17032900
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/032900 | Low capacitance transient voltage suppressor including a punch-through silicon controlled rectifier as low-side steering diode | Sep 24, 2020 | Issued |
Array
(
[id] => 16528847
[patent_doc_number] => 20200402928
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-12-24
[patent_title] => INTEGRATED CIRCUIT CONTAINING A DECOY STRUCTURE
[patent_app_type] => utility
[patent_app_number] => 17/014058
[patent_app_country] => US
[patent_app_date] => 2020-09-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6976
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 131
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17014058
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/014058 | Integrated circuit containing a decoy structure | Sep 7, 2020 | Issued |
Array
(
[id] => 16516199
[patent_doc_number] => 20200395457
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-12-17
[patent_title] => SEMICONDUCTOR STRUCTURE
[patent_app_type] => utility
[patent_app_number] => 17/007579
[patent_app_country] => US
[patent_app_date] => 2020-08-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8701
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 51
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17007579
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/007579 | Semiconductor structure | Aug 30, 2020 | Issued |
Array
(
[id] => 16516153
[patent_doc_number] => 20200395411
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-12-17
[patent_title] => SEMICONDUCTOR STRUCTURE WITH DATA STORAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 16/948034
[patent_app_country] => US
[patent_app_date] => 2020-08-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5914
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16948034
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/948034 | Semiconductor structure with data storage structure and method for manufacturing the same | Aug 27, 2020 | Issued |