
Bilkis Jahan
Examiner (ID: 16855, Phone: (571)270-5022 , Office: P/2817 )
| Most Active Art Unit | 2817 |
| Art Unit(s) | 2817, 2809, 2896, 2814, 2816, 4122 |
| Total Applications | 1200 |
| Issued Applications | 1021 |
| Pending Applications | 107 |
| Abandoned Applications | 118 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 16515982
[patent_doc_number] => 20200395240
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-12-17
[patent_title] => LOCAL INSULATION BY OXIDE REGION MADE FROM POROUS SILICON
[patent_app_type] => utility
[patent_app_number] => 17/001295
[patent_app_country] => US
[patent_app_date] => 2020-08-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7387
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 81
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17001295
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/001295 | Semiconductor structure with partially embedded insulation region and related method | Aug 23, 2020 | Issued |
Array
(
[id] => 18394956
[patent_doc_number] => 20230163177
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-05-25
[patent_title] => LDMOS DEVICE AND METHOD FOR PREPARATION THEREOF
[patent_app_type] => utility
[patent_app_number] => 17/766406
[patent_app_country] => US
[patent_app_date] => 2020-08-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3942
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 177
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17766406
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/766406 | LDMOS device and method for preparation thereof | Aug 17, 2020 | Issued |
Array
(
[id] => 17933410
[patent_doc_number] => 20220328536
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-10-13
[patent_title] => IMAGING DEVICE, PRODUCTION METHOD, AND ELECTRONIC APPARATUS
[patent_app_type] => utility
[patent_app_number] => 17/634328
[patent_app_country] => US
[patent_app_date] => 2020-08-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8731
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 156
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17634328
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/634328 | IMAGING DEVICE, PRODUCTION METHOD, AND ELECTRONIC APPARATUS | Aug 16, 2020 | Abandoned |
Array
(
[id] => 18721670
[patent_doc_number] => 11799027
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-10-24
[patent_title] => Semiconductor device
[patent_app_type] => utility
[patent_app_number] => 16/992558
[patent_app_country] => US
[patent_app_date] => 2020-08-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 26
[patent_no_of_words] => 12646
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 203
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16992558
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/992558 | Semiconductor device | Aug 12, 2020 | Issued |
Array
(
[id] => 17417303
[patent_doc_number] => 20220052207
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-02-17
[patent_title] => SEMICONDUCTOR DEVICE STRUCTURES AND METHODS OF MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 15/734550
[patent_app_country] => US
[patent_app_date] => 2020-08-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5233
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15734550
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/734550 | Semiconductor device structures and methods of manufacturing the same | Aug 12, 2020 | Issued |
Array
(
[id] => 18891055
[patent_doc_number] => 11869832
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-01-09
[patent_title] => Leadframe package using selectively pre-plated leadframe
[patent_app_type] => utility
[patent_app_number] => 16/990645
[patent_app_country] => US
[patent_app_date] => 2020-08-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 9
[patent_no_of_words] => 4354
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 81
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16990645
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/990645 | Leadframe package using selectively pre-plated leadframe | Aug 10, 2020 | Issued |
Array
(
[id] => 18131369
[patent_doc_number] => 11557586
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-01-17
[patent_title] => Device including integrated electrostatic discharge protection component
[patent_app_type] => utility
[patent_app_number] => 16/987294
[patent_app_country] => US
[patent_app_date] => 2020-08-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 9730
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 135
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16987294
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/987294 | Device including integrated electrostatic discharge protection component | Aug 5, 2020 | Issued |
Array
(
[id] => 18137307
[patent_doc_number] => 11562996
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-01-24
[patent_title] => Device including integrated electrostatic discharge protection component
[patent_app_type] => utility
[patent_app_number] => 16/987292
[patent_app_country] => US
[patent_app_date] => 2020-08-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 9754
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16987292
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/987292 | Device including integrated electrostatic discharge protection component | Aug 5, 2020 | Issued |
Array
(
[id] => 17810603
[patent_doc_number] => 20220262438
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-08-18
[patent_title] => MEMORY DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/629801
[patent_app_country] => US
[patent_app_date] => 2020-07-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 35262
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -14
[patent_words_short_claim] => 146
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17629801
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/629801 | Memory device | Jul 21, 2020 | Issued |
Array
(
[id] => 17145407
[patent_doc_number] => 20210313420
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-10-07
[patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/928307
[patent_app_country] => US
[patent_app_date] => 2020-07-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11914
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -36
[patent_words_short_claim] => 69
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16928307
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/928307 | Semiconductor device and manufacturing method of semiconductor device | Jul 13, 2020 | Issued |
Array
(
[id] => 18507582
[patent_doc_number] => 11705409
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-07-18
[patent_title] => Semiconductor device having antenna on chip package and manufacturing method thereof
[patent_app_type] => utility
[patent_app_number] => 16/916066
[patent_app_country] => US
[patent_app_date] => 2020-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 21
[patent_no_of_words] => 6760
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 69
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16916066
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/916066 | Semiconductor device having antenna on chip package and manufacturing method thereof | Jun 28, 2020 | Issued |
Array
(
[id] => 18219535
[patent_doc_number] => 11594484
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-02-28
[patent_title] => Forming bonding structures by using template layer as templates
[patent_app_type] => utility
[patent_app_number] => 16/915312
[patent_app_country] => US
[patent_app_date] => 2020-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 4947
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 107
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16915312
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/915312 | Forming bonding structures by using template layer as templates | Jun 28, 2020 | Issued |
Array
(
[id] => 19720495
[patent_doc_number] => 12206040
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-01-21
[patent_title] => Method for homogenising the cross-section of nanowires for light-emitting diodes
[patent_app_type] => utility
[patent_app_number] => 17/619820
[patent_app_country] => US
[patent_app_date] => 2020-06-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 11
[patent_no_of_words] => 5731
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 84
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17619820
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/619820 | Method for homogenising the cross-section of nanowires for light-emitting diodes | Jun 24, 2020 | Issued |
Array
(
[id] => 17878633
[patent_doc_number] => 11450657
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-09-20
[patent_title] => Semiconductor device with improved electrostatic discharge or electro-over stress protection
[patent_app_type] => utility
[patent_app_number] => 16/899584
[patent_app_country] => US
[patent_app_date] => 2020-06-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 12
[patent_no_of_words] => 6462
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 159
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16899584
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/899584 | Semiconductor device with improved electrostatic discharge or electro-over stress protection | Jun 11, 2020 | Issued |
Array
(
[id] => 18081352
[patent_doc_number] => 20220406964
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-12-22
[patent_title] => LIGHT EMITTING DIODE AND MANUFACTURING METHOD THEREFOR
[patent_app_type] => utility
[patent_app_number] => 17/441123
[patent_app_country] => US
[patent_app_date] => 2020-06-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5522
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17441123
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/441123 | Light emitting diode and manufacturing method therefor | Jun 9, 2020 | Issued |
Array
(
[id] => 16332549
[patent_doc_number] => 20200303515
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-09-24
[patent_title] => SEMICONDUCTOR STRUCTURE WITH PROTECTION LAYER
[patent_app_type] => utility
[patent_app_number] => 16/895060
[patent_app_country] => US
[patent_app_date] => 2020-06-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9041
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16895060
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/895060 | Semiconductor structure with protection layer | Jun 7, 2020 | Issued |
Array
(
[id] => 19213767
[patent_doc_number] => 12002841
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-06-04
[patent_title] => Optoelectronic device comprising two wire-shaped light-emitting diodes each having a layer that limits the leakage currents
[patent_app_type] => utility
[patent_app_number] => 17/613699
[patent_app_country] => US
[patent_app_date] => 2020-05-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 6805
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 226
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17613699
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/613699 | Optoelectronic device comprising two wire-shaped light-emitting diodes each having a layer that limits the leakage currents | May 27, 2020 | Issued |
Array
(
[id] => 17738308
[patent_doc_number] => 20220223770
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-07-14
[patent_title] => OPTICAL DISPLAY DEVICE WITH AMBIENT CONTRAST ENHANCEMENT COVER PLATE
[patent_app_type] => utility
[patent_app_number] => 17/611832
[patent_app_country] => US
[patent_app_date] => 2020-05-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8312
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17611832
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/611832 | OPTICAL DISPLAY DEVICE WITH AMBIENT CONTRAST ENHANCEMENT COVER PLATE | May 14, 2020 | Abandoned |
Array
(
[id] => 19640482
[patent_doc_number] => 12171107
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-12-17
[patent_title] => Imaging element, stacked imaging element and solid-state imaging device, and method of manufacturing imaging element
[patent_app_type] => utility
[patent_app_number] => 17/614084
[patent_app_country] => US
[patent_app_date] => 2020-04-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 80
[patent_figures_cnt] => 91
[patent_no_of_words] => 48142
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 65
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17614084
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/614084 | Imaging element, stacked imaging element and solid-state imaging device, and method of manufacturing imaging element | Apr 29, 2020 | Issued |
Array
(
[id] => 17239541
[patent_doc_number] => 11183432
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-11-23
[patent_title] => Integrated circuits with recessed gate electrodes
[patent_app_type] => utility
[patent_app_number] => 16/844588
[patent_app_country] => US
[patent_app_date] => 2020-04-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 20
[patent_no_of_words] => 7474
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 277
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16844588
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/844588 | Integrated circuits with recessed gate electrodes | Apr 8, 2020 | Issued |