Search

Bilkis Jahan

Examiner (ID: 16855, Phone: (571)270-5022 , Office: P/2817 )

Most Active Art Unit
2817
Art Unit(s)
2817, 2809, 2896, 2814, 2816, 4122
Total Applications
1200
Issued Applications
1021
Pending Applications
107
Abandoned Applications
118

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14889311 [patent_doc_number] => 10424707 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-24 [patent_title] => Flexible LED assembly with UV protection [patent_app_type] => utility [patent_app_number] => 16/135317 [patent_app_country] => US [patent_app_date] => 2018-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 10 [patent_no_of_words] => 3161 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16135317 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/135317
Flexible LED assembly with UV protection Sep 18, 2018 Issued
Array ( [id] => 16280264 [patent_doc_number] => 10763305 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-01 [patent_title] => Semiconductor structure with data storage structure [patent_app_type] => utility [patent_app_number] => 16/134063 [patent_app_country] => US [patent_app_date] => 2018-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 5940 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16134063 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/134063
Semiconductor structure with data storage structure Sep 17, 2018 Issued
Array ( [id] => 17107535 [patent_doc_number] => 11127761 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-21 [patent_title] => TFT array substrate and display panel where the second metallic layer is withdrawn for a distance to prevent problems such as broken film and oxidization [patent_app_type] => utility [patent_app_number] => 16/096812 [patent_app_country] => US [patent_app_date] => 2018-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2013 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16096812 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/096812
TFT array substrate and display panel where the second metallic layer is withdrawn for a distance to prevent problems such as broken film and oxidization Aug 30, 2018 Issued
Array ( [id] => 13995751 [patent_doc_number] => 20190067033 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-28 [patent_title] => Surface Mount Semiconductor Device and Method of Manufacture [patent_app_type] => utility [patent_app_number] => 16/111470 [patent_app_country] => US [patent_app_date] => 2018-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3984 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16111470 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/111470
Surface mount semiconductor device and method of manufacture Aug 23, 2018 Issued
Array ( [id] => 16356424 [patent_doc_number] => 10796942 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-06 [patent_title] => Semiconductor structure with partially embedded insulation region [patent_app_type] => utility [patent_app_number] => 16/105403 [patent_app_country] => US [patent_app_date] => 2018-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 28 [patent_no_of_words] => 7387 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16105403 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/105403
Semiconductor structure with partially embedded insulation region Aug 19, 2018 Issued
Array ( [id] => 15532519 [patent_doc_number] => 20200058565 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-20 [patent_title] => FORMING VERTICAL TRANSISTOR DEVICES WITH GREATER LAYOUT FLEXIBILITY AND PACKING DENSITY [patent_app_type] => utility [patent_app_number] => 16/105690 [patent_app_country] => US [patent_app_date] => 2018-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7374 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16105690 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/105690
Forming vertical transistor devices with greater layout flexibility and packing density Aug 19, 2018 Issued
Array ( [id] => 15673283 [patent_doc_number] => 10600885 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-24 [patent_title] => Vertical fin field effect transistor devices with self-aligned source and drain junctions [patent_app_type] => utility [patent_app_number] => 16/105442 [patent_app_country] => US [patent_app_date] => 2018-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 20 [patent_no_of_words] => 7180 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16105442 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/105442
Vertical fin field effect transistor devices with self-aligned source and drain junctions Aug 19, 2018 Issued
Array ( [id] => 16173010 [patent_doc_number] => 10714590 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-14 [patent_title] => Semiconductor structure with protection layer and fabrication method thereof [patent_app_type] => utility [patent_app_number] => 16/105562 [patent_app_country] => US [patent_app_date] => 2018-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 17 [patent_no_of_words] => 9025 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16105562 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/105562
Semiconductor structure with protection layer and fabrication method thereof Aug 19, 2018 Issued
Array ( [id] => 16356629 [patent_doc_number] => 10797147 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-06 [patent_title] => Semiconductor structure and fabrication method thereof [patent_app_type] => utility [patent_app_number] => 16/105670 [patent_app_country] => US [patent_app_date] => 2018-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 8671 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 291 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16105670 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/105670
Semiconductor structure and fabrication method thereof Aug 19, 2018 Issued
Array ( [id] => 15093413 [patent_doc_number] => 20190341518 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-07 [patent_title] => PROXIMITY SENSING MODULE WITH DUAL TRANSMITTERS [patent_app_type] => utility [patent_app_number] => 16/105450 [patent_app_country] => US [patent_app_date] => 2018-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5200 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16105450 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/105450
Proximity sensing module with dual transmitters Aug 19, 2018 Issued
Array ( [id] => 14382079 [patent_doc_number] => 20190164952 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-30 [patent_title] => DEVICE WITH ESD PROTECTION [patent_app_type] => utility [patent_app_number] => 16/105494 [patent_app_country] => US [patent_app_date] => 2018-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8743 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16105494 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/105494
Device including integrated electrostatic discharge protection component Aug 19, 2018 Issued
Array ( [id] => 15200149 [patent_doc_number] => 10497576 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-12-03 [patent_title] => Devices with slotted active regions [patent_app_type] => utility [patent_app_number] => 16/105388 [patent_app_country] => US [patent_app_date] => 2018-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 2371 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16105388 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/105388
Devices with slotted active regions Aug 19, 2018 Issued
Array ( [id] => 16386459 [patent_doc_number] => 10811304 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-20 [patent_title] => Increased isolation of diffusion breaks in FinFET devices using an angled etch [patent_app_type] => utility [patent_app_number] => 16/036592 [patent_app_country] => US [patent_app_date] => 2018-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 20 [patent_no_of_words] => 4295 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16036592 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/036592
Increased isolation of diffusion breaks in FinFET devices using an angled etch Jul 15, 2018 Issued
Array ( [id] => 16372456 [patent_doc_number] => 10804222 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-13 [patent_title] => Integrated circuit containing a decoy structure formed by an electrically insulated silicide sector [patent_app_type] => utility [patent_app_number] => 16/036639 [patent_app_country] => US [patent_app_date] => 2018-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 19 [patent_no_of_words] => 6958 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16036639 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/036639
Integrated circuit containing a decoy structure formed by an electrically insulated silicide sector Jul 15, 2018 Issued
Array ( [id] => 14049881 [patent_doc_number] => 20190081048 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-14 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/036908 [patent_app_country] => US [patent_app_date] => 2018-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3916 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16036908 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/036908
Semiconductor memory device including gate structure Jul 15, 2018 Issued
Array ( [id] => 14644457 [patent_doc_number] => 10366978 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-07-30 [patent_title] => Grounded gate NMOS transistor having source pulled back region [patent_app_type] => utility [patent_app_number] => 16/036914 [patent_app_country] => US [patent_app_date] => 2018-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2077 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16036914 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/036914
Grounded gate NMOS transistor having source pulled back region Jul 15, 2018 Issued
Array ( [id] => 17716803 [patent_doc_number] => 11380804 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-05 [patent_title] => Semiconductor device with higher breakdown voltage and electronic apparatus [patent_app_type] => utility [patent_app_number] => 16/640504 [patent_app_country] => US [patent_app_date] => 2018-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 27 [patent_no_of_words] => 13330 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 254 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16640504 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/640504
Semiconductor device with higher breakdown voltage and electronic apparatus Jul 12, 2018 Issued
Array ( [id] => 16724123 [patent_doc_number] => 20210091270 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-25 [patent_title] => LIGHT-EMITTING DEVICES HAVING AN ANTI REFLECTIVE SILICON CARBIDE OR SAPPHIRE SUBSTRATE AND METHODS OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 16/630246 [patent_app_country] => US [patent_app_date] => 2018-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6342 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16630246 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/630246
LIGHT-EMITTING DEVICES HAVING AN ANTI REFLECTIVE SILICON CARBIDE OR SAPPHIRE SUBSTRATE AND METHODS OF FORMING THE SAME Jul 11, 2018 Abandoned
Array ( [id] => 14920781 [patent_doc_number] => 10431718 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-01 [patent_title] => Substrate with topological features for steering fluidic assembly LED disks [patent_app_type] => utility [patent_app_number] => 16/025167 [patent_app_country] => US [patent_app_date] => 2018-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 6724 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16025167 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/025167
Substrate with topological features for steering fluidic assembly LED disks Jul 1, 2018 Issued
Array ( [id] => 15331985 [patent_doc_number] => 20200006322 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-02 [patent_title] => SCHOTTKY DIODE STRUCTURES AND INTEGRATION WITH III-V TRANSISTORS [patent_app_type] => utility [patent_app_number] => 16/024705 [patent_app_country] => US [patent_app_date] => 2018-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10611 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16024705 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/024705
Schottky diode structures and integration with III-V transistors Jun 28, 2018 Issued
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