Search

Bing Zhao

Examiner (ID: 19699)

Most Active Art Unit
2195
Art Unit(s)
2195, 2151, 2198
Total Applications
565
Issued Applications
487
Pending Applications
38
Abandoned Applications
48

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16690550 [patent_doc_number] => 20210073028 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-11 [patent_title] => JOB SCHEDULING ON DISTRIBUTED COMPUTING DEVICES [patent_app_type] => utility [patent_app_number] => 16/600437 [patent_app_country] => US [patent_app_date] => 2019-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9143 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -30 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16600437 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/600437
Recommendations for scheduling jobs on distributed computing devices Oct 10, 2019 Issued
Array ( [id] => 15757771 [patent_doc_number] => 10620998 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-14 [patent_title] => Task switching and inter-task communications for coordination of applications executing on a multi-user parallel processing architecture [patent_app_type] => utility [patent_app_number] => 16/577909 [patent_app_country] => US [patent_app_date] => 2019-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 16056 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 493 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16577909 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/577909
Task switching and inter-task communications for coordination of applications executing on a multi-user parallel processing architecture Sep 19, 2019 Issued
Array ( [id] => 16690557 [patent_doc_number] => 20210073035 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-11 [patent_title] => TECHNIQUES FOR CONFIGURING A PROCESSOR TO FUNCTION AS MULTIPLE, SEPARATE PROCESSORS [patent_app_type] => utility [patent_app_number] => 16/562364 [patent_app_country] => US [patent_app_date] => 2019-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 37874 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16562364 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/562364
Techniques for reconfiguring partitions in a parallel processing system Sep 4, 2019 Issued
Array ( [id] => 16675670 [patent_doc_number] => 20210064436 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-04 [patent_title] => MODEL-BASED INITIALIZATION OF WORKLOADS FOR RESOURCE ALLOCATION ADAPTATION [patent_app_type] => utility [patent_app_number] => 16/554897 [patent_app_country] => US [patent_app_date] => 2019-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10614 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16554897 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/554897
Initialization of resource allocation for a workload characterized using a regression model Aug 28, 2019 Issued
Array ( [id] => 16675680 [patent_doc_number] => 20210064446 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-04 [patent_title] => DETERMINING WHEN IT IS SAFE TO USE SCHEDULER LOCK-ACQUIRING WAKEUPS TO DEFER QUIESCENT STATES IN REAL-TIME PREEMPTIBLE READ-COPY UPDATE [patent_app_type] => utility [patent_app_number] => 16/555269 [patent_app_country] => US [patent_app_date] => 2019-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7035 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16555269 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/555269
Determining when it is safe to use scheduler lock-acquiring wakeups to defer quiescent states in real-time preemptible read-copy update Aug 28, 2019 Issued
Array ( [id] => 16423770 [patent_doc_number] => 20200348968 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-05 [patent_title] => ACTIVE QUEUE MANAGEMENT IN A MULTI-NODE COMPUTING ENVIRONMENT [patent_app_type] => utility [patent_app_number] => 16/552362 [patent_app_country] => US [patent_app_date] => 2019-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15361 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 258 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16552362 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/552362
Active queue management in a multi-node computing environment Aug 26, 2019 Issued
Array ( [id] => 17698959 [patent_doc_number] => 11372683 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-06-28 [patent_title] => Placement of virtual GPU requests in virtual GPU enabled systems using a requested memory requirement of the virtual GPU request [patent_app_type] => utility [patent_app_number] => 16/550313 [patent_app_country] => US [patent_app_date] => 2019-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6907 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16550313 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/550313
Placement of virtual GPU requests in virtual GPU enabled systems using a requested memory requirement of the virtual GPU request Aug 25, 2019 Issued
Array ( [id] => 17651427 [patent_doc_number] => 11354154 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-06-07 [patent_title] => Timer task ownership determination in a cluster based on a common cluster member selection algorithm [patent_app_type] => utility [patent_app_number] => 16/545746 [patent_app_country] => US [patent_app_date] => 2019-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 11539 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 264 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16545746 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/545746
Timer task ownership determination in a cluster based on a common cluster member selection algorithm Aug 19, 2019 Issued
Array ( [id] => 16551582 [patent_doc_number] => 10884741 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-05 [patent_title] => Persistent transactional memory metadata-based buffer caches [patent_app_type] => utility [patent_app_number] => 16/536589 [patent_app_country] => US [patent_app_date] => 2019-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10961 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16536589 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/536589
Persistent transactional memory metadata-based buffer caches Aug 8, 2019 Issued
Array ( [id] => 15182279 [patent_doc_number] => 20190361731 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-28 [patent_title] => METHOD AND APPARATUS FOR WRITING SERVICE DATA INTO BLOCK CHAIN AND METHOD FOR DETERMINING SERVICE SUBSET [patent_app_type] => utility [patent_app_number] => 16/535035 [patent_app_country] => US [patent_app_date] => 2019-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11621 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16535035 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/535035
Method and apparatus for writing service data into block chain and method for determining service subset Aug 6, 2019 Issued
Array ( [id] => 15214739 [patent_doc_number] => 20190370056 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-05 [patent_title] => DEVICE AND METHOD OF RUNNING MULTIPLE OPERATING SYSTEMS AND PRESENTING MULTIPLE OPERATION SCREENS [patent_app_type] => utility [patent_app_number] => 16/530487 [patent_app_country] => US [patent_app_date] => 2019-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9113 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16530487 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/530487
Device and method of running multiple operating systems and presenting multiple operation screens using locking of host operating system Aug 1, 2019 Issued
Array ( [id] => 17091638 [patent_doc_number] => 11119828 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-14 [patent_title] => Digital processing system for event and/or time based triggering management, and control of tasks [patent_app_type] => utility [patent_app_number] => 16/516491 [patent_app_country] => US [patent_app_date] => 2019-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7310 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 303 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16516491 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/516491
Digital processing system for event and/or time based triggering management, and control of tasks Jul 18, 2019 Issued
Array ( [id] => 15090395 [patent_doc_number] => 20190340008 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-07 [patent_title] => Device and Method for Hardware Virtualization Support [patent_app_type] => utility [patent_app_number] => 16/514638 [patent_app_country] => US [patent_app_date] => 2019-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4572 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16514638 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/514638
Device and method for hardware virtualization support using a virtual timer number Jul 16, 2019 Issued
Array ( [id] => 17817247 [patent_doc_number] => 11422858 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-23 [patent_title] => Linked workload-processor-resource-schedule/processing-system--operating-parameter workload performance system [patent_app_type] => utility [patent_app_number] => 16/508078 [patent_app_country] => US [patent_app_date] => 2019-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8499 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 363 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16508078 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/508078
Linked workload-processor-resource-schedule/processing-system--operating-parameter workload performance system Jul 9, 2019 Issued
Array ( [id] => 15042829 [patent_doc_number] => 20190332419 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-31 [patent_title] => DATA PROCESSING ARCHITECTURE FOR IMPROVED DATA FLOW [patent_app_type] => utility [patent_app_number] => 16/505484 [patent_app_country] => US [patent_app_date] => 2019-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16993 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16505484 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/505484
Data processing architecture for improved data flow Jul 7, 2019 Issued
Array ( [id] => 17698949 [patent_doc_number] => 11372673 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-06-28 [patent_title] => Artificial intelligence chip and instruction execution method for artificial intelligence chip [patent_app_type] => utility [patent_app_number] => 16/505127 [patent_app_country] => US [patent_app_date] => 2019-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 11694 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 252 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16505127 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/505127
Artificial intelligence chip and instruction execution method for artificial intelligence chip Jul 7, 2019 Issued
Array ( [id] => 18234816 [patent_doc_number] => 11599374 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-07 [patent_title] => System and method for providing preferential I/O treatment to devices that host a critical virtual machine [patent_app_type] => utility [patent_app_number] => 16/458836 [patent_app_country] => US [patent_app_date] => 2019-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7707 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16458836 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/458836
System and method for providing preferential I/O treatment to devices that host a critical virtual machine Jun 30, 2019 Issued
Array ( [id] => 15936973 [patent_doc_number] => 20200160120 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-21 [patent_title] => COMPUTING DEVICE AND METHOD FOR OPERATING COMPUTING DEVICE [patent_app_type] => utility [patent_app_number] => 16/444632 [patent_app_country] => US [patent_app_date] => 2019-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6379 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16444632 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/444632
Computing device for handling tasks in a multi-core processor, and method for operating computing device Jun 17, 2019 Issued
Array ( [id] => 14782129 [patent_doc_number] => 20190265962 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-29 [patent_title] => METHOD AND SYSTEM FOR MANAGING THE END TO END LIFECYCLE OF THE VIRTUALIZATION ENVIRONMENT FOR AN APPLIANCE [patent_app_type] => utility [patent_app_number] => 16/408189 [patent_app_country] => US [patent_app_date] => 2019-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3634 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16408189 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/408189
Method and system for managing the end to end lifecycle of a virtualization environment May 8, 2019 Issued
Array ( [id] => 14917845 [patent_doc_number] => 10430242 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-01 [patent_title] => Task switching and inter-task communications for coordination of applications executing on a multi-user parallel processing architecture [patent_app_type] => utility [patent_app_number] => 16/399567 [patent_app_country] => US [patent_app_date] => 2019-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 15927 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 485 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16399567 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/399567
Task switching and inter-task communications for coordination of applications executing on a multi-user parallel processing architecture Apr 29, 2019 Issued
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