Search

Binh X. Tran

Examiner (ID: 14481, Phone: (571)272-1469 , Office: P/1713 )

Most Active Art Unit
1713
Art Unit(s)
1713, 1792, 1765
Total Applications
1675
Issued Applications
1301
Pending Applications
123
Abandoned Applications
268

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6180096 [patent_doc_number] => 20110122406 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-26 [patent_title] => 'PROCESSES FOR RAPID MICROFABRICATION USING THERMOPLASTICS AND DEVICES THEREOF' [patent_app_type] => utility [patent_app_number] => 12/742598 [patent_app_country] => US [patent_app_date] => 2008-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 13982 [patent_no_of_claims] => 57 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0122/20110122406.pdf [firstpage_image] =>[orig_patent_app_number] => 12742598 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/742598
Processes for rapid microfabrication using thermoplastics and devices thereof Nov 11, 2008 Issued
Array ( [id] => 5364634 [patent_doc_number] => 20090302193 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-10 [patent_title] => 'MOLD CORE WITH DEPOSITION ISLANDS AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/255541 [patent_app_country] => US [patent_app_date] => 2008-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 1792 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0302/20090302193.pdf [firstpage_image] =>[orig_patent_app_number] => 12255541 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/255541
MOLD CORE WITH DEPOSITION ISLANDS AND METHOD FOR MANUFACTURING THE SAME Oct 20, 2008 Abandoned
Array ( [id] => 6478154 [patent_doc_number] => 20100092392 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-15 [patent_title] => 'Pet Scanning Determination of Lymph Nodes Enriched in 124 I Labeled Antibodies for Cancer Patient Prognostication' [patent_app_type] => utility [patent_app_number] => 12/248074 [patent_app_country] => US [patent_app_date] => 2008-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 8039 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0092/20100092392.pdf [firstpage_image] =>[orig_patent_app_number] => 12248074 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/248074
Method of determining the course of treatment for a patient having adenocarcinoma Oct 8, 2008 Issued
Array ( [id] => 9025972 [patent_doc_number] => 08535551 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-09-17 [patent_title] => 'Plasma etching method' [patent_app_type] => utility [patent_app_number] => 12/733828 [patent_app_country] => US [patent_app_date] => 2008-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3948 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12733828 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/733828
Plasma etching method Sep 25, 2008 Issued
Array ( [id] => 6592401 [patent_doc_number] => 20100062265 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-11 [patent_title] => 'Titanium Dioxide Coatings and Methods of Forming Titanium Dioxide Coatings Having Reduced Crystallite Size' [patent_app_type] => utility [patent_app_number] => 12/207235 [patent_app_country] => US [patent_app_date] => 2008-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4256 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0062/20100062265.pdf [firstpage_image] =>[orig_patent_app_number] => 12207235 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/207235
Titanium Dioxide Coatings and Methods of Forming Titanium Dioxide Coatings Having Reduced Crystallite Size Sep 8, 2008 Abandoned
Array ( [id] => 5450411 [patent_doc_number] => 20090066447 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-03-12 [patent_title] => 'High speed interconnect and method of manufacture' [patent_app_type] => utility [patent_app_number] => 12/202422 [patent_app_country] => US [patent_app_date] => 2008-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 9909 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0066/20090066447.pdf [firstpage_image] =>[orig_patent_app_number] => 12202422 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/202422
High speed interconnect and method of manufacture Aug 31, 2008 Issued
Array ( [id] => 5439056 [patent_doc_number] => 20090090695 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-09 [patent_title] => 'Yttria insulator ring for use inside a plasma chamber' [patent_app_type] => utility [patent_app_number] => 12/230404 [patent_app_country] => US [patent_app_date] => 2008-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5153 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0090/20090090695.pdf [firstpage_image] =>[orig_patent_app_number] => 12230404 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/230404
Yttria insulator ring for use inside a plasma chamber Aug 27, 2008 Abandoned
Array ( [id] => 9153011 [patent_doc_number] => 08585912 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-11-19 [patent_title] => 'System, method and apparatus for batch vapor deposition of adhesion promoter for manufacturing discrete track media and bit-patterned media, and mono-molecular layer lubricant on magnetic recording media' [patent_app_type] => utility [patent_app_number] => 12/177950 [patent_app_country] => US [patent_app_date] => 2008-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 1760 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12177950 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/177950
System, method and apparatus for batch vapor deposition of adhesion promoter for manufacturing discrete track media and bit-patterned media, and mono-molecular layer lubricant on magnetic recording media Jul 22, 2008 Issued
Array ( [id] => 5416510 [patent_doc_number] => 20090042397 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-02-12 [patent_title] => 'COPPER RE-DEPOSITION PREVENTING METHOD, SEMICONDUCTOR DEVICE MANUFACTURING METHOD, AND SUBSTRATE PROCESSING APPARATUS' [patent_app_type] => utility [patent_app_number] => 12/178158 [patent_app_country] => US [patent_app_date] => 2008-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8324 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0042/20090042397.pdf [firstpage_image] =>[orig_patent_app_number] => 12178158 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/178158
COPPER RE-DEPOSITION PREVENTING METHOD, SEMICONDUCTOR DEVICE MANUFACTURING METHOD, AND SUBSTRATE PROCESSING APPARATUS Jul 22, 2008 Abandoned
Array ( [id] => 6352782 [patent_doc_number] => 20100022088 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-01-28 [patent_title] => 'MULTIPLE EXPOSURE AND SINGLE ETCH INTEGRATION METHOD' [patent_app_type] => utility [patent_app_number] => 12/177690 [patent_app_country] => US [patent_app_date] => 2008-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 3126 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0022/20100022088.pdf [firstpage_image] =>[orig_patent_app_number] => 12177690 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/177690
Multiple exposure and single etch integration method Jul 21, 2008 Issued
Array ( [id] => 5288957 [patent_doc_number] => 20090021687 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-22 [patent_title] => 'Method of lifting off and fabricating array substrate for liquid crystal display device using the same' [patent_app_type] => utility [patent_app_number] => 12/219306 [patent_app_country] => US [patent_app_date] => 2008-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 34 [patent_no_of_words] => 10633 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0021/20090021687.pdf [firstpage_image] =>[orig_patent_app_number] => 12219306 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/219306
Method of lifting off and fabricating array substrate for liquid crystal display device using the same Jul 17, 2008 Issued
Array ( [id] => 8469780 [patent_doc_number] => 08298958 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-30 [patent_title] => 'Organic line width roughness with H2 plasma treatment' [patent_app_type] => utility [patent_app_number] => 12/175153 [patent_app_country] => US [patent_app_date] => 2008-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 18 [patent_no_of_words] => 3853 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12175153 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/175153
Organic line width roughness with H2 plasma treatment Jul 16, 2008 Issued
Array ( [id] => 8875233 [patent_doc_number] => 08470190 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-25 [patent_title] => 'Method for processing portions of walls of an opening formed in a silicon substrate' [patent_app_type] => utility [patent_app_number] => 12/173925 [patent_app_country] => US [patent_app_date] => 2008-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 22 [patent_no_of_words] => 3760 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12173925 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/173925
Method for processing portions of walls of an opening formed in a silicon substrate Jul 15, 2008 Issued
Array ( [id] => 4599563 [patent_doc_number] => 07977246 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-07-12 [patent_title] => 'Thermal annealing method for preventing defects in doped silicon oxide surfaces during exposure to atmosphere' [patent_app_type] => utility [patent_app_number] => 12/173279 [patent_app_country] => US [patent_app_date] => 2008-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 4009 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/977/07977246.pdf [firstpage_image] =>[orig_patent_app_number] => 12173279 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/173279
Thermal annealing method for preventing defects in doped silicon oxide surfaces during exposure to atmosphere Jul 14, 2008 Issued
Array ( [id] => 6539456 [patent_doc_number] => 20100015895 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-01-21 [patent_title] => 'Chemical mechanical polishing pad having electrospun polishing layer' [patent_app_type] => utility [patent_app_number] => 12/173403 [patent_app_country] => US [patent_app_date] => 2008-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8193 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0015/20100015895.pdf [firstpage_image] =>[orig_patent_app_number] => 12173403 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/173403
Chemical mechanical polishing pad having electrospun polishing layer Jul 14, 2008 Abandoned
Array ( [id] => 5558357 [patent_doc_number] => 20090269934 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-10-29 [patent_title] => 'PLASMA TREATMENT METHOD FOR PREVENTING DEFECTS IN DOPED SILICON OXIDE SURFACES DURING EXPOSURE TO ATMOSPHERE' [patent_app_type] => utility [patent_app_number] => 12/173331 [patent_app_country] => US [patent_app_date] => 2008-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4004 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0269/20090269934.pdf [firstpage_image] =>[orig_patent_app_number] => 12173331 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/173331
Plasma treatment method for preventing defects in doped silicon oxide surfaces during exposure to atmosphere Jul 14, 2008 Issued
Array ( [id] => 7739236 [patent_doc_number] => 08105499 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-01-31 [patent_title] => 'Transmission electron microscopy sample etching fixture' [patent_app_type] => utility [patent_app_number] => 12/172876 [patent_app_country] => US [patent_app_date] => 2008-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 1927 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/105/08105499.pdf [firstpage_image] =>[orig_patent_app_number] => 12172876 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/172876
Transmission electron microscopy sample etching fixture Jul 13, 2008 Issued
Array ( [id] => 8317436 [patent_doc_number] => 08232212 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-31 [patent_title] => 'Within-sequence metrology based process tuning for adaptive self-aligned double patterning' [patent_app_type] => utility [patent_app_number] => 12/172106 [patent_app_country] => US [patent_app_date] => 2008-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 8591 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12172106 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/172106
Within-sequence metrology based process tuning for adaptive self-aligned double patterning Jul 10, 2008 Issued
Array ( [id] => 7534700 [patent_doc_number] => 08048322 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-11-01 [patent_title] => 'Method for manufacturing thermal interface material having carbon nanotubes' [patent_app_type] => utility [patent_app_number] => 12/171307 [patent_app_country] => US [patent_app_date] => 2008-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 1969 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/048/08048322.pdf [firstpage_image] =>[orig_patent_app_number] => 12171307 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/171307
Method for manufacturing thermal interface material having carbon nanotubes Jul 10, 2008 Issued
Array ( [id] => 5310351 [patent_doc_number] => 20090017632 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-15 [patent_title] => 'METHODS OF MANUFACTURING SEMICONDUCTOR STRUCTURES USING RIE PROCESS' [patent_app_type] => utility [patent_app_number] => 12/170956 [patent_app_country] => US [patent_app_date] => 2008-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2918 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0017/20090017632.pdf [firstpage_image] =>[orig_patent_app_number] => 12170956 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/170956
Methods of manufacturing semiconductor structures using RIE process Jul 9, 2008 Issued
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