Search

Blair M Johnson

Examiner (ID: 2087, Phone: (571)272-6830 , Office: P/3634 )

Most Active Art Unit
3634
Art Unit(s)
3509, 3505, 3623, 3634
Total Applications
3198
Issued Applications
2324
Pending Applications
84
Abandoned Applications
790

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17063231 [patent_doc_number] => 11107843 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-31 [patent_title] => Array substrate, manufacturing method thereof, and display panel [patent_app_type] => utility [patent_app_number] => 15/775086 [patent_app_country] => US [patent_app_date] => 2017-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 8866 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15775086 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/775086
Array substrate, manufacturing method thereof, and display panel Oct 8, 2017 Issued
Array ( [id] => 14738235 [patent_doc_number] => 10388527 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-20 [patent_title] => Method of manufacturing semiconductor device [patent_app_type] => utility [patent_app_number] => 15/726603 [patent_app_country] => US [patent_app_date] => 2017-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 4341 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 268 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15726603 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/726603
Method of manufacturing semiconductor device Oct 5, 2017 Issued
Array ( [id] => 14163813 [patent_doc_number] => 20190109009 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-11 [patent_title] => METHOD FOR SELECTIVELY DEPOSITING A METALLIC FILM ON A SUBSTRATE [patent_app_type] => utility [patent_app_number] => 15/726222 [patent_app_country] => US [patent_app_date] => 2017-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9086 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15726222 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/726222
Method for selectively depositing a metallic film on a substrate Oct 4, 2017 Issued
Array ( [id] => 15250421 [patent_doc_number] => 10510739 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-17 [patent_title] => Method of providing layout design of SRAM cell [patent_app_type] => utility [patent_app_number] => 15/726334 [patent_app_country] => US [patent_app_date] => 2017-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 9868 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 251 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15726334 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/726334
Method of providing layout design of SRAM cell Oct 4, 2017 Issued
Array ( [id] => 16660717 [patent_doc_number] => 20210057354 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-25 [patent_title] => WARPAGE MITIGATION STRUCTURES CREATED ON SUBSTRATE USING HIGH THROUGHPUT ADDITIVE MANUFACTURING [patent_app_type] => utility [patent_app_number] => 16/638741 [patent_app_country] => US [patent_app_date] => 2017-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19691 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16638741 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/638741
Warpage mitigation structures created on substrate using high throughput additive manufacturing Sep 29, 2017 Issued
Array ( [id] => 17105839 [patent_doc_number] => 11126048 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-21 [patent_title] => Array substrate and display device [patent_app_type] => utility [patent_app_number] => 15/776455 [patent_app_country] => US [patent_app_date] => 2017-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4568 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15776455 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/776455
Array substrate and display device Sep 21, 2017 Issued
Array ( [id] => 14762673 [patent_doc_number] => 10392725 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-27 [patent_title] => Method for depositing silicon feedstock material, silicon wafer, solar cell and PV module [patent_app_type] => utility [patent_app_number] => 15/708227 [patent_app_country] => US [patent_app_date] => 2017-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 7127 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15708227 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/708227
Method for depositing silicon feedstock material, silicon wafer, solar cell and PV module Sep 18, 2017 Issued
Array ( [id] => 13936095 [patent_doc_number] => 20190051563 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-14 [patent_title] => METHODS, APPARATUS, AND MANUFACTURING SYSTEM FOR SELF-ALIGNED PATTERNING OF A VERTICAL TRANSISTOR [patent_app_type] => utility [patent_app_number] => 15/676005 [patent_app_country] => US [patent_app_date] => 2017-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7507 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15676005 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/676005
Methods, apparatus, and manufacturing system for self-aligned patterning of a vertical transistor Aug 13, 2017 Issued
Array ( [id] => 17284133 [patent_doc_number] => 11201176 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-14 [patent_title] => Array substrate, display apparatus, and method of fabricating array substrate [patent_app_type] => utility [patent_app_number] => 16/070098 [patent_app_country] => US [patent_app_date] => 2017-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 5624 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16070098 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/070098
Array substrate, display apparatus, and method of fabricating array substrate Aug 7, 2017 Issued
Array ( [id] => 16218724 [patent_doc_number] => 10734547 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-04 [patent_title] => Semiconductor device and semiconductor device package comprising same [patent_app_type] => utility [patent_app_number] => 16/312937 [patent_app_country] => US [patent_app_date] => 2017-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 26 [patent_no_of_words] => 16712 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16312937 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/312937
Semiconductor device and semiconductor device package comprising same Jun 22, 2017 Issued
Array ( [id] => 16645660 [patent_doc_number] => 10923528 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-16 [patent_title] => Optoelectronic device comprising pixels with improved contrast and brightness [patent_app_type] => utility [patent_app_number] => 16/313005 [patent_app_country] => US [patent_app_date] => 2017-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 41 [patent_no_of_words] => 11857 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 261 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16313005 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/313005
Optoelectronic device comprising pixels with improved contrast and brightness Jun 21, 2017 Issued
Array ( [id] => 15024283 [patent_doc_number] => 20190323146 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-24 [patent_title] => GROUP III NITRIDE LAMINATE AND VERTICAL SEMICONDUCTOR DEVICE HAVING THE LAMINATE [patent_app_type] => utility [patent_app_number] => 16/312885 [patent_app_country] => US [patent_app_date] => 2017-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6165 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 28 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16312885 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/312885
Group III nitride laminate and vertical semiconductor device having the laminate Jun 18, 2017 Issued
Array ( [id] => 11959315 [patent_doc_number] => 20170263467 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-14 [patent_title] => 'METHODS OF FORMING A PORTION OF A MEMORY ARRAY HAVING A CONDUCTOR HAVING A VARIABLE CONCENTRATION OF GERMANIUM' [patent_app_type] => utility [patent_app_number] => 15/606080 [patent_app_country] => US [patent_app_date] => 2017-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 10488 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15606080 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/606080
Methods of forming a portion of a memory array having a conductor having a variable concentration of germanium May 25, 2017 Issued
Array ( [id] => 15200435 [patent_doc_number] => 10497720 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-03 [patent_title] => Display device [patent_app_type] => utility [patent_app_number] => 15/600909 [patent_app_country] => US [patent_app_date] => 2017-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 11059 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15600909 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/600909
Display device May 21, 2017 Issued
Array ( [id] => 13528621 [patent_doc_number] => 20180315853 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-01 [patent_title] => SEMICONDUCTOR DEVICE WITH CONTRACTED ISOLATION FEATURE AND FORMATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 15/600919 [patent_app_country] => US [patent_app_date] => 2017-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8044 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15600919 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/600919
Semiconductor device with contracted isolation feature and formation method thereof May 21, 2017 Issued
Array ( [id] => 14738653 [patent_doc_number] => 10388737 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-20 [patent_title] => Electric field shielding in silicon carbide metal-oxide-semiconductor (MOS) devices having an optimization layer [patent_app_type] => utility [patent_app_number] => 15/601754 [patent_app_country] => US [patent_app_date] => 2017-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 21 [patent_no_of_words] => 8584 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 318 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15601754 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/601754
Electric field shielding in silicon carbide metal-oxide-semiconductor (MOS) devices having an optimization layer May 21, 2017 Issued
Array ( [id] => 14151671 [patent_doc_number] => 10256225 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-09 [patent_title] => Gate-less electrostatic discharge systems and methods for forming [patent_app_type] => utility [patent_app_number] => 15/601141 [patent_app_country] => US [patent_app_date] => 2017-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8049 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15601141 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/601141
Gate-less electrostatic discharge systems and methods for forming May 21, 2017 Issued
Array ( [id] => 15468253 [patent_doc_number] => 10549988 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-04 [patent_title] => Wafer-level package with enhanced performance [patent_app_type] => utility [patent_app_number] => 15/601858 [patent_app_country] => US [patent_app_date] => 2017-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 5941 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15601858 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/601858
Wafer-level package with enhanced performance May 21, 2017 Issued
Array ( [id] => 13085267 [patent_doc_number] => 10062707 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-08-28 [patent_title] => Semiconductor device and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 15/601474 [patent_app_country] => US [patent_app_date] => 2017-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 9573 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15601474 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/601474
Semiconductor device and method of manufacturing the same May 21, 2017 Issued
Array ( [id] => 13271323 [patent_doc_number] => 10147748 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-04 [patent_title] => Image sensor chip [patent_app_type] => utility [patent_app_number] => 15/600962 [patent_app_country] => US [patent_app_date] => 2017-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3955 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15600962 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/600962
Image sensor chip May 21, 2017 Issued
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