Blair M Johnson
Examiner (ID: 2087, Phone: (571)272-6830 , Office: P/3634 )
Most Active Art Unit | 3634 |
Art Unit(s) | 3509, 3505, 3623, 3634 |
Total Applications | 3198 |
Issued Applications | 2324 |
Pending Applications | 84 |
Abandoned Applications | 790 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 18031958
[patent_doc_number] => 11515156
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-11-29
[patent_title] => Methods for depositing blocking layers on conductive surfaces
[patent_app_type] => utility
[patent_app_number] => 17/147097
[patent_app_country] => US
[patent_app_date] => 2021-01-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 3426
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17147097
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/147097 | Methods for depositing blocking layers on conductive surfaces | Jan 11, 2021 | Issued |
Array
(
[id] => 17925840
[patent_doc_number] => 11469101
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-10-11
[patent_title] => Semiconductor structure and manufacturing method therefor
[patent_app_type] => utility
[patent_app_number] => 17/143877
[patent_app_country] => US
[patent_app_date] => 2021-01-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 12
[patent_no_of_words] => 4264
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 146
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17143877
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/143877 | Semiconductor structure and manufacturing method therefor | Jan 6, 2021 | Issued |
Array
(
[id] => 17025565
[patent_doc_number] => 20210249437
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-08-12
[patent_title] => ELECTRO-THERMAL METHOD TO MANUFACTURE MONOCRYSTALLINE VERTICALLY ORIENTED SILICON CHANNELS FOR THREE-DIMENSIONAL (3D) NAND MEMORIES
[patent_app_type] => utility
[patent_app_number] => 17/139823
[patent_app_country] => US
[patent_app_date] => 2020-12-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6446
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 109
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17139823
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/139823 | Electro-thermal method to manufacture monocrystalline vertically oriented silicon channels for three-dimensional (3D) NAND memories | Dec 30, 2020 | Issued |
Array
(
[id] => 18898740
[patent_doc_number] => 20240014225
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-01-11
[patent_title] => DISPLAY SUBSTRATE, PREPARATION METHOD THEREOF, AND DISPLAY PANEL
[patent_app_type] => utility
[patent_app_number] => 17/418218
[patent_app_country] => US
[patent_app_date] => 2020-12-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7274
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 72
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17418218
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/418218 | Display substrate, preparation method thereof, and display panel | Dec 28, 2020 | Issued |
Array
(
[id] => 17708683
[patent_doc_number] => 20220208691
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-06-30
[patent_title] => SEMICONDUCTOR STRUCTURE WITH ONE OR MORE SUPPORT STRUCTURES
[patent_app_type] => utility
[patent_app_number] => 17/135399
[patent_app_country] => US
[patent_app_date] => 2020-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9159
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 36
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17135399
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/135399 | Semiconductor structure with one or more support structures | Dec 27, 2020 | Issued |
Array
(
[id] => 19584150
[patent_doc_number] => 12150297
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-11-19
[patent_title] => Thin film transistors having a backside channel contact for high density memory
[patent_app_type] => utility
[patent_app_number] => 17/129869
[patent_app_country] => US
[patent_app_date] => 2020-12-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6890
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 132
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17129869
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/129869 | Thin film transistors having a backside channel contact for high density memory | Dec 20, 2020 | Issued |
Array
(
[id] => 17692111
[patent_doc_number] => 20220199404
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-06-23
[patent_title] => PLASMA ENHANCED DEPOSITION OF SILICON-CONTAINING FILMS AT LOW TEMPERATURE
[patent_app_type] => utility
[patent_app_number] => 17/125349
[patent_app_country] => US
[patent_app_date] => 2020-12-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8501
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 66
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17125349
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/125349 | Plasma enhanced deposition of silicon-containing films at low temperature | Dec 16, 2020 | Issued |
Array
(
[id] => 18054288
[patent_doc_number] => 11527684
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-12-13
[patent_title] => Patterned downconverter and adhesive film for micro-LED, mini-LED downconverter mass transfer
[patent_app_type] => utility
[patent_app_number] => 17/112633
[patent_app_country] => US
[patent_app_date] => 2020-12-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 21
[patent_no_of_words] => 8130
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17112633
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/112633 | Patterned downconverter and adhesive film for micro-LED, mini-LED downconverter mass transfer | Dec 3, 2020 | Issued |
Array
(
[id] => 16713471
[patent_doc_number] => 20210080618
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-03-18
[patent_title] => GLASS LAMINATE, FRONT PLATE FOR DISPLAY, AND DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/103103
[patent_app_country] => US
[patent_app_date] => 2020-11-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 20340
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 118
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17103103
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/103103 | GLASS LAMINATE, FRONT PLATE FOR DISPLAY, AND DISPLAY DEVICE | Nov 23, 2020 | Pending |
Array
(
[id] => 19315986
[patent_doc_number] => 12041822
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-07-16
[patent_title] => Display panel and display apparatus
[patent_app_type] => utility
[patent_app_number] => 17/600556
[patent_app_country] => US
[patent_app_date] => 2020-11-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 21
[patent_no_of_words] => 10639
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 379
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17600556
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/600556 | Display panel and display apparatus | Nov 19, 2020 | Issued |
Array
(
[id] => 16692062
[patent_doc_number] => 20210074541
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-03-11
[patent_title] => METHODS AND MATERIAL DEPOSITION SYSTEMS FOR FORMING SEMICONDUCTOR LAYERS
[patent_app_type] => utility
[patent_app_number] => 16/949860
[patent_app_country] => US
[patent_app_date] => 2020-11-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 19797
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -31
[patent_words_short_claim] => 221
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16949860
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/949860 | Methods and material deposition systems for forming semiconductor layers | Nov 16, 2020 | Issued |
Array
(
[id] => 16692063
[patent_doc_number] => 20210074542
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-03-11
[patent_title] => METHODS AND MATERIAL DEPOSITION SYSTEMS FOR FORMING SEMICONDUCTOR LAYERS
[patent_app_type] => utility
[patent_app_number] => 16/949861
[patent_app_country] => US
[patent_app_date] => 2020-11-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 19816
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 137
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16949861
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/949861 | Methods and material deposition systems for forming semiconductor layers | Nov 16, 2020 | Issued |
Array
(
[id] => 17901006
[patent_doc_number] => 20220310668
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-09-29
[patent_title] => ARRAY SUBSTRATE AND DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/265859
[patent_app_country] => US
[patent_app_date] => 2020-11-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3686
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17265859
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/265859 | Array substrate and display device | Nov 12, 2020 | Issued |
Array
(
[id] => 18967392
[patent_doc_number] => 11901172
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-02-13
[patent_title] => Method and device for the surface treatment of substrates
[patent_app_type] => utility
[patent_app_number] => 17/090280
[patent_app_country] => US
[patent_app_date] => 2020-11-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 11
[patent_no_of_words] => 10692
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17090280
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/090280 | Method and device for the surface treatment of substrates | Nov 4, 2020 | Issued |
Array
(
[id] => 17582938
[patent_doc_number] => 20220139793
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-05-05
[patent_title] => POWER SEMICONDUCTOR DEVICES WITH IMPROVED OVERCOAT ADHESION AND/OR PROTECTION
[patent_app_type] => utility
[patent_app_number] => 17/088647
[patent_app_country] => US
[patent_app_date] => 2020-11-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11662
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17088647
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/088647 | POWER SEMICONDUCTOR DEVICES WITH IMPROVED OVERCOAT ADHESION AND/OR PROTECTION | Nov 3, 2020 | Pending |
Array
(
[id] => 18857406
[patent_doc_number] => 11855001
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-12-26
[patent_title] => Leadless leadframe and semiconductor device package therefrom
[patent_app_type] => utility
[patent_app_number] => 17/089372
[patent_app_country] => US
[patent_app_date] => 2020-11-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 3530
[patent_no_of_claims] => 38
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17089372
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/089372 | Leadless leadframe and semiconductor device package therefrom | Nov 3, 2020 | Issued |
Array
(
[id] => 17607345
[patent_doc_number] => 11335837
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-05-17
[patent_title] => Light emitting diode package
[patent_app_type] => utility
[patent_app_number] => 17/086736
[patent_app_country] => US
[patent_app_date] => 2020-11-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 22
[patent_no_of_words] => 10418
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 231
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17086736
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/086736 | Light emitting diode package | Nov 1, 2020 | Issued |
Array
(
[id] => 18999194
[patent_doc_number] => 11916050
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-02-27
[patent_title] => Display device and manufacturing method thereof
[patent_app_type] => utility
[patent_app_number] => 17/057101
[patent_app_country] => US
[patent_app_date] => 2020-10-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 15
[patent_no_of_words] => 5115
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 182
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17057101
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/057101 | Display device and manufacturing method thereof | Oct 29, 2020 | Issued |
Array
(
[id] => 17410194
[patent_doc_number] => 11251091
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-02-15
[patent_title] => Semiconductor device with contracted isolation feature
[patent_app_type] => utility
[patent_app_number] => 17/074306
[patent_app_country] => US
[patent_app_date] => 2020-10-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 8218
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17074306
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/074306 | Semiconductor device with contracted isolation feature | Oct 18, 2020 | Issued |
Array
(
[id] => 16617476
[patent_doc_number] => 20210036129
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-02-04
[patent_title] => Semiconductor Device, Method, and Tool of Manufacture
[patent_app_type] => utility
[patent_app_number] => 17/068578
[patent_app_country] => US
[patent_app_date] => 2020-10-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8273
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17068578
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/068578 | Semiconductor device, method, and tool of manufacture | Oct 11, 2020 | Issued |