Search

Bo Bin Jang

Examiner (ID: 12239, Phone: (571)270-0271 , Office: P/2894 )

Most Active Art Unit
2894
Art Unit(s)
2894, 2818
Total Applications
768
Issued Applications
624
Pending Applications
85
Abandoned Applications
74

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 15468253 [patent_doc_number] => 10549988 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-04 [patent_title] => Wafer-level package with enhanced performance [patent_app_type] => utility [patent_app_number] => 15/601858 [patent_app_country] => US [patent_app_date] => 2017-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 5941 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15601858 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/601858
Wafer-level package with enhanced performance May 21, 2017 Issued
Array ( [id] => 13057071 [patent_doc_number] => 10049933 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-08-14 [patent_title] => Element chip manufacturing method [patent_app_type] => utility [patent_app_number] => 15/594690 [patent_app_country] => US [patent_app_date] => 2017-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 9920 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 254 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15594690 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/594690
Element chip manufacturing method May 14, 2017 Issued
Array ( [id] => 12615042 [patent_doc_number] => 20180096844 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-04-05 [patent_title] => METHOD OF GAS-PHASE DEPOSITION BY EPITAXY [patent_app_type] => utility [patent_app_number] => 15/594763 [patent_app_country] => US [patent_app_date] => 2017-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2911 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15594763 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/594763
METHOD OF GAS-PHASE DEPOSITION BY EPITAXY May 14, 2017 Abandoned
Array ( [id] => 14459909 [patent_doc_number] => 10325928 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-18 [patent_title] => Method of manufacturing thin film transistor, dehydrogenating apparatus for performing the same, and organic light emitting display device including thin film transistor manufactured by the same [patent_app_type] => utility [patent_app_number] => 15/595463 [patent_app_country] => US [patent_app_date] => 2017-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 18 [patent_no_of_words] => 15970 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15595463 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/595463
Method of manufacturing thin film transistor, dehydrogenating apparatus for performing the same, and organic light emitting display device including thin film transistor manufactured by the same May 14, 2017 Issued
Array ( [id] => 12990121 [patent_doc_number] => 20170345781 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-30 [patent_title] => ELEMENT CHIP MANUFACTURING METHOD [patent_app_type] => utility [patent_app_number] => 15/594696 [patent_app_country] => US [patent_app_date] => 2017-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9633 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15594696 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/594696
Element chip manufacturing method May 14, 2017 Issued
Array ( [id] => 12054913 [patent_doc_number] => 20170331257 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-16 [patent_title] => 'LIGHT-EMITTING SEMICONDUCTOR CHIP AND METHOD FOR PRODUCING A SEMICONDUCTOR LIGHT-EMITTING CHIP' [patent_app_type] => utility [patent_app_number] => 15/594397 [patent_app_country] => US [patent_app_date] => 2017-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 15753 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15594397 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/594397
Light-emitting semiconductor chip and method for producing a semiconductor light-emitting chip May 11, 2017 Issued
Array ( [id] => 13098931 [patent_doc_number] => 10068811 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-09-04 [patent_title] => Method of evaluating gettering property [patent_app_type] => utility [patent_app_number] => 15/594073 [patent_app_country] => US [patent_app_date] => 2017-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 7977 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15594073 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/594073
Method of evaluating gettering property May 11, 2017 Issued
Array ( [id] => 12062062 [patent_doc_number] => 20170338406 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-23 [patent_title] => 'METHODS AND APPARATUSES FOR PRODUCING MAGNETORESISTIVE APPARATUSES' [patent_app_type] => utility [patent_app_number] => 15/593504 [patent_app_country] => US [patent_app_date] => 2017-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3981 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15593504 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/593504
Methods and apparatuses for producing magnetoresistive apparatuses May 11, 2017 Issued
Array ( [id] => 12054652 [patent_doc_number] => 20170330996 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-16 [patent_title] => 'SEMICONDUCTOR CHIP AND METHOD FOR PRODUCING A SEMICONDUCTOR CHIP' [patent_app_type] => utility [patent_app_number] => 15/594519 [patent_app_country] => US [patent_app_date] => 2017-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 17518 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15594519 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/594519
Semiconductor chip and method for producing a semiconductor chip May 11, 2017 Issued
Array ( [id] => 11946031 [patent_doc_number] => 20170250182 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-31 [patent_title] => 'INTEGRATING VLSI-COMPATIBLE FIN STRUCTURES WITH SELECTIVE EPITAXIAL GROWTH AND FABRICATING DEVICES THEREON' [patent_app_type] => utility [patent_app_number] => 15/594466 [patent_app_country] => US [patent_app_date] => 2017-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 15873 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15594466 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/594466
INTEGRATING VLSI-COMPATIBLE FIN STRUCTURES WITH SELECTIVE EPITAXIAL GROWTH AND FABRICATING DEVICES THEREON May 11, 2017 Abandoned
Array ( [id] => 16609209 [patent_doc_number] => 10910222 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-02 [patent_title] => Method for manufacturing semiconductor device [patent_app_type] => utility [patent_app_number] => 16/475252 [patent_app_country] => US [patent_app_date] => 2017-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 2025 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16475252 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/475252
Method for manufacturing semiconductor device May 11, 2017 Issued
Array ( [id] => 13159589 [patent_doc_number] => 10096528 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-09 [patent_title] => Critical dimension control by use of a photo agent [patent_app_type] => utility [patent_app_number] => 15/594187 [patent_app_country] => US [patent_app_date] => 2017-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 5475 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15594187 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/594187
Critical dimension control by use of a photo agent May 11, 2017 Issued
Array ( [id] => 14177819 [patent_doc_number] => 10262930 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-16 [patent_title] => Interposer and method for manufacturing interposer [patent_app_type] => utility [patent_app_number] => 15/492291 [patent_app_country] => US [patent_app_date] => 2017-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 17 [patent_no_of_words] => 4736 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 251 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15492291 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/492291
Interposer and method for manufacturing interposer Apr 19, 2017 Issued
Array ( [id] => 13754721 [patent_doc_number] => 10170312 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-01-01 [patent_title] => Semiconductor substrate and manufacturing method of the same [patent_app_type] => utility [patent_app_number] => 15/492410 [patent_app_country] => US [patent_app_date] => 2017-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5362 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15492410 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/492410
Semiconductor substrate and manufacturing method of the same Apr 19, 2017 Issued
Array ( [id] => 13514817 [patent_doc_number] => 20180308951 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-25 [patent_title] => THERMALLY STABLE SALICIDE FORMATION FOR SALICIDE FIRST CONTACTS [patent_app_type] => utility [patent_app_number] => 15/492418 [patent_app_country] => US [patent_app_date] => 2017-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7218 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15492418 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/492418
Thermally stable salicide formation for salicide first contacts Apr 19, 2017 Issued
Array ( [id] => 14063917 [patent_doc_number] => 10236261 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-03-19 [patent_title] => Electronic package and method for fabricating the same [patent_app_type] => utility [patent_app_number] => 15/492394 [patent_app_country] => US [patent_app_date] => 2017-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 3130 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15492394 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/492394
Electronic package and method for fabricating the same Apr 19, 2017 Issued
Array ( [id] => 12005540 [patent_doc_number] => 20170309696 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-26 [patent_title] => 'ACTIVE-MATRIX DISPLAY DEVICE' [patent_app_type] => utility [patent_app_number] => 15/492464 [patent_app_country] => US [patent_app_date] => 2017-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6942 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15492464 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/492464
Active-matrix display device Apr 19, 2017 Issued
Array ( [id] => 12122258 [patent_doc_number] => 20180005845 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-04 [patent_title] => 'PACKING METHOD FOR SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 15/489775 [patent_app_country] => US [patent_app_date] => 2017-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 8806 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15489775 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/489775
Packing method for semiconductor device Apr 17, 2017 Issued
Array ( [id] => 13499587 [patent_doc_number] => 20180301336 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-18 [patent_title] => METHOD OF PATTERN TRANSFER [patent_app_type] => utility [patent_app_number] => 15/489842 [patent_app_country] => US [patent_app_date] => 2017-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5488 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15489842 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/489842
Method of pattern transfer Apr 17, 2017 Issued
Array ( [id] => 13174087 [patent_doc_number] => 10103167 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-10-16 [patent_title] => Manufacturing method of semiconductor structure [patent_app_type] => utility [patent_app_number] => 15/489765 [patent_app_country] => US [patent_app_date] => 2017-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 3863 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15489765 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/489765
Manufacturing method of semiconductor structure Apr 17, 2017 Issued
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