Bot L. Ledynh

Array ( [id] => 16723471 [patent_doc_number] => 20210090618 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-25 [patent_title] => Active Random Access Memory [patent_app_type] => utility [patent_app_number] => 17/117261 [patent_app_country] => US [patent_app_date] => 2020-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4510 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17117261 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16690434 [patent_doc_number] => 20210072912 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-11 [patent_title] => METHOD AND SYSTEM FOR INLINE DEDUPLICATION USING ERASURE CODING [patent_app_type] => utility [patent_app_number] => 17/100178 [patent_app_country] => US [patent_app_date] => 2020-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5346 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17100178 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16690670 [patent_doc_number] => 20210073148 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-11 [patent_title] => PERIPHERAL DEVICE WITH EMBEDDED VIDEO CODEC FUNCTIONALITY [patent_app_type] => utility [patent_app_number] => 17/100435 [patent_app_country] => US [patent_app_date] => 2020-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5908 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 32 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17100435 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17877234 [patent_doc_number] => 11449247 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-20 [patent_title] => Periphery shoreline augmentation for integrated circuits [patent_app_type] => utility [patent_app_number] => 16/953138 [patent_app_country] => US [patent_app_date] => 2020-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 7922 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16953138 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16630471 [patent_doc_number] => 20210049124 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-18 [patent_title] => MONOLITHICALLY INTEGRATED SYSTEM ON CHIP FOR SILICON PHOTONICS [patent_app_type] => utility [patent_app_number] => 17/088197 [patent_app_country] => US [patent_app_date] => 2020-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9277 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 365 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17088197 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18889518 [patent_doc_number] => 11868288 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-09 [patent_title] => Verification system and verification method for Ethernet interface chip [patent_app_type] => utility [patent_app_number] => 17/775310 [patent_app_country] => US [patent_app_date] => 2020-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 3231 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17775310 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16849083 [patent_doc_number] => 20210149828 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-20 [patent_title] => MEMORY CONTROLLER, MEMORY SYSTEM AND OPERATING METHOD OF THE MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 17/078194 [patent_app_country] => US [patent_app_date] => 2020-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22200 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17078194 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17326302 [patent_doc_number] => 11217327 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-01-04 [patent_title] => Operating method of a storage device including a nonvolatile memory device and a controller [patent_app_type] => utility [patent_app_number] => 17/039798 [patent_app_country] => US [patent_app_date] => 2020-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 6866 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17039798 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17128728 [patent_doc_number] => 20210303497 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-30 [patent_title] => METHOD OF OPERATING AUDIO SUBSYSTEM FOR USB MODULE, SYSTEM-ON-CHIP PERFORMING THE SAME AND METHOD OF OPERATING SYSTEM-ON-CHIP USING THE SAME [patent_app_type] => utility [patent_app_number] => 17/038297 [patent_app_country] => US [patent_app_date] => 2020-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8969 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17038297 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16934570 [patent_doc_number] => 20210200459 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-01 [patent_title] => STAND-ALONE BRIDGING TEST METHOD [patent_app_type] => utility [patent_app_number] => 17/037800 [patent_app_country] => US [patent_app_date] => 2020-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2449 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17037800 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16577477 [patent_doc_number] => 20210011878 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-14 [patent_title] => SCALABLE 2.5D INTERFACE CIRCUITRY [patent_app_type] => utility [patent_app_number] => 17/037642 [patent_app_country] => US [patent_app_date] => 2020-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6540 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -63 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17037642 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16577473 [patent_doc_number] => 20210011874 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-14 [patent_title] => Systems and Methods for Aligning Received Data [patent_app_type] => utility [patent_app_number] => 17/032560 [patent_app_country] => US [patent_app_date] => 2020-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7511 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17032560 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18030546 [patent_doc_number] => 11513733 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-29 [patent_title] => Processing-in-memory (PIM) system and operating methods of the PIM system [patent_app_type] => utility [patent_app_number] => 17/027276 [patent_app_country] => US [patent_app_date] => 2020-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 24129 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17027276 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18030546 [patent_doc_number] => 11513733 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-29 [patent_title] => Processing-in-memory (PIM) system and operating methods of the PIM system [patent_app_type] => utility [patent_app_number] => 17/027276 [patent_app_country] => US [patent_app_date] => 2020-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 24129 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17027276 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18030546 [patent_doc_number] => 11513733 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-29 [patent_title] => Processing-in-memory (PIM) system and operating methods of the PIM system [patent_app_type] => utility [patent_app_number] => 17/027276 [patent_app_country] => US [patent_app_date] => 2020-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 24129 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17027276 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18030546 [patent_doc_number] => 11513733 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-29 [patent_title] => Processing-in-memory (PIM) system and operating methods of the PIM system [patent_app_type] => utility [patent_app_number] => 17/027276 [patent_app_country] => US [patent_app_date] => 2020-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 24129 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17027276 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17572961 [patent_doc_number] => 11321231 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-03 [patent_title] => Memory system and method of controlling nonvolatile memory with a write buffer [patent_app_type] => utility [patent_app_number] => 17/016666 [patent_app_country] => US [patent_app_date] => 2020-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 21 [patent_no_of_words] => 14464 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 324 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17016666 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17114163 [patent_doc_number] => 20210294760 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-23 [patent_title] => SEMICONDUCTOR STORAGE DEVICE AND CONTROL METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/011017 [patent_app_country] => US [patent_app_date] => 2020-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7024 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17011017 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17667006 [patent_doc_number] => 11360701 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-06-14 [patent_title] => Memory and storage controller with integrated memory coherency interconnect [patent_app_type] => utility [patent_app_number] => 17/010739 [patent_app_country] => US [patent_app_date] => 2020-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 2777 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17010739 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17838352 [patent_doc_number] => 20220275657 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-01 [patent_title] => GUARDRAIL SAFETY SYSTEM AND METHOD [patent_app_type] => utility [patent_app_number] => 17/637616 [patent_app_country] => US [patent_app_date] => 2020-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3449 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 266 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17637616 [rel_patent_id] =>[rel_patent_doc_number] =>)