
Bradley R. Spies
Examiner (ID: 10754, Phone: (571)272-3469 , Office: P/1777 )
| Most Active Art Unit | 1777 |
| Art Unit(s) | 1777 |
| Total Applications | 943 |
| Issued Applications | 639 |
| Pending Applications | 108 |
| Abandoned Applications | 212 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6694942
[patent_doc_number] => 20030107136
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-06-12
[patent_title] => 'Chip structure and process for forming the same'
[patent_app_type] => new
[patent_app_number] => 10/337673
[patent_app_country] => US
[patent_app_date] => 2003-01-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 8199
[patent_no_of_claims] => 220
[patent_no_of_ind_claims] => 13
[patent_words_short_claim] => 134
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0107/20030107136.pdf
[firstpage_image] =>[orig_patent_app_number] => 10337673
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/337673 | Chip structure to improve resistance-capacitance delay and reduce energy loss of the chip | Jan 5, 2003 | Issued |
Array
(
[id] => 6690934
[patent_doc_number] => 20030038366
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-02-27
[patent_title] => 'Three-dimensional semiconductor device having plural active semiconductor components'
[patent_app_type] => new
[patent_app_number] => 10/268752
[patent_app_country] => US
[patent_app_date] => 2002-10-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 31
[patent_figures_cnt] => 31
[patent_no_of_words] => 7866
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 50
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0038/20030038366.pdf
[firstpage_image] =>[orig_patent_app_number] => 10268752
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/268752 | Three-dimensional semiconductor device having plural active semiconductor components | Oct 10, 2002 | Abandoned |
Array
(
[id] => 7963791
[patent_doc_number] => 06680532
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-01-20
[patent_title] => 'Multi chip module'
[patent_app_type] => B1
[patent_app_number] => 10/265751
[patent_app_country] => US
[patent_app_date] => 2002-10-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 2015
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/680/06680532.pdf
[firstpage_image] =>[orig_patent_app_number] => 10265751
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/265751 | Multi chip module | Oct 6, 2002 | Issued |
Array
(
[id] => 1197830
[patent_doc_number] => 06727582
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-04-27
[patent_title] => 'Semiconductor device'
[patent_app_type] => B2
[patent_app_number] => 10/255961
[patent_app_country] => US
[patent_app_date] => 2002-09-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3379
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 194
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/727/06727582.pdf
[firstpage_image] =>[orig_patent_app_number] => 10255961
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/255961 | Semiconductor device | Sep 26, 2002 | Issued |
Array
(
[id] => 6776269
[patent_doc_number] => 20030047349
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-03-13
[patent_title] => 'Integrated circuit package and printed circuit board arrangement'
[patent_app_type] => new
[patent_app_number] => 10/065016
[patent_app_country] => US
[patent_app_date] => 2002-09-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2909
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 135
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0047/20030047349.pdf
[firstpage_image] =>[orig_patent_app_number] => 10065016
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/065016 | Integrated circuit package and printed circuit board arrangement | Sep 9, 2002 | Issued |
Array
(
[id] => 6718712
[patent_doc_number] => 20030052399
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-03-20
[patent_title] => 'Semiconductor device having semiconductor element packaged on interposer'
[patent_app_type] => new
[patent_app_number] => 10/222841
[patent_app_country] => US
[patent_app_date] => 2002-08-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 5511
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 132
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0052/20030052399.pdf
[firstpage_image] =>[orig_patent_app_number] => 10222841
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/222841 | Semiconductor device having semiconductor element packaged on interposer | Aug 18, 2002 | Issued |
Array
(
[id] => 1225227
[patent_doc_number] => 06700207
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-03-02
[patent_title] => 'Flip-chip ball grid array package for electromigration testing'
[patent_app_type] => B2
[patent_app_number] => 10/212448
[patent_app_country] => US
[patent_app_date] => 2002-08-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 3025
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 105
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/700/06700207.pdf
[firstpage_image] =>[orig_patent_app_number] => 10212448
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/212448 | Flip-chip ball grid array package for electromigration testing | Aug 4, 2002 | Issued |
Array
(
[id] => 1056352
[patent_doc_number] => 06855575
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-02-15
[patent_title] => 'Semiconductor chip package having a semiconductor chip with center and edge bonding pads and manufacturing method thereof'
[patent_app_type] => utility
[patent_app_number] => 10/202764
[patent_app_country] => US
[patent_app_date] => 2002-07-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 11
[patent_no_of_words] => 2725
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 190
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/855/06855575.pdf
[firstpage_image] =>[orig_patent_app_number] => 10202764
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/202764 | Semiconductor chip package having a semiconductor chip with center and edge bonding pads and manufacturing method thereof | Jul 23, 2002 | Issued |
Array
(
[id] => 1210966
[patent_doc_number] => 06713862
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-03-30
[patent_title] => 'Low temperature co-fired ceramic-metal packaging technology'
[patent_app_type] => B2
[patent_app_number] => 10/199418
[patent_app_country] => US
[patent_app_date] => 2002-07-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 9
[patent_no_of_words] => 4712
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/713/06713862.pdf
[firstpage_image] =>[orig_patent_app_number] => 10199418
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/199418 | Low temperature co-fired ceramic-metal packaging technology | Jul 18, 2002 | Issued |
Array
(
[id] => 6748096
[patent_doc_number] => 20030042616
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-03-06
[patent_title] => 'ANGLED EDGE CONNECTIONS FOR MULTICHIP STRUCTURES'
[patent_app_type] => new
[patent_app_number] => 10/198791
[patent_app_country] => US
[patent_app_date] => 2002-07-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3915
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 154
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0042/20030042616.pdf
[firstpage_image] =>[orig_patent_app_number] => 10198791
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/198791 | Angled edge connections for multichip structures | Jul 17, 2002 | Issued |
Array
(
[id] => 7421199
[patent_doc_number] => 20040000702
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-01-01
[patent_title] => 'Integrated circuit and laminated leadframe package'
[patent_app_type] => new
[patent_app_number] => 10/183287
[patent_app_country] => US
[patent_app_date] => 2002-06-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2887
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0000/20040000702.pdf
[firstpage_image] =>[orig_patent_app_number] => 10183287
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/183287 | Integrated circuit and laminated leadframe package | Jun 26, 2002 | Issued |
Array
(
[id] => 6170363
[patent_doc_number] => 20020153618
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-10-24
[patent_title] => 'Semiconductor device'
[patent_app_type] => new
[patent_app_number] => 10/162613
[patent_app_country] => US
[patent_app_date] => 2002-06-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 25
[patent_no_of_words] => 8534
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0153/20020153618.pdf
[firstpage_image] =>[orig_patent_app_number] => 10162613
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/162613 | Semiconductor device | Jun 5, 2002 | Issued |
Array
(
[id] => 6153920
[patent_doc_number] => 20020145188
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-10-10
[patent_title] => 'Flat semiconductor device and power converter employing the same'
[patent_app_type] => new
[patent_app_number] => 10/161674
[patent_app_country] => US
[patent_app_date] => 2002-06-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 8048
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 107
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0145/20020145188.pdf
[firstpage_image] =>[orig_patent_app_number] => 10161674
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/161674 | Flat semiconductor device and power converter employing the same | Jun 4, 2002 | Abandoned |
Array
(
[id] => 6539039
[patent_doc_number] => 20020137261
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-09-26
[patent_title] => 'Semiconductor device'
[patent_app_type] => new
[patent_app_number] => 10/152726
[patent_app_country] => US
[patent_app_date] => 2002-05-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 6217
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0137/20020137261.pdf
[firstpage_image] =>[orig_patent_app_number] => 10152726
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/152726 | Method of making semiconductor device having improved heat radiation plate arrangement | May 22, 2002 | Issued |
Array
(
[id] => 6539052
[patent_doc_number] => 20020137262
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-09-26
[patent_title] => 'Semiconductor device'
[patent_app_type] => new
[patent_app_number] => 10/152727
[patent_app_country] => US
[patent_app_date] => 2002-05-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0137/20020137262.pdf
[firstpage_image] =>[orig_patent_app_number] => 10152727
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/152727 | Semiconductor device | May 22, 2002 | Issued |
Array
(
[id] => 1218120
[patent_doc_number] => 06707148
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-03-16
[patent_title] => 'Bumped integrated circuits for optical applications'
[patent_app_type] => B1
[patent_app_number] => 10/153269
[patent_app_country] => US
[patent_app_date] => 2002-05-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_no_of_words] => 2490
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/707/06707148.pdf
[firstpage_image] =>[orig_patent_app_number] => 10153269
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/153269 | Bumped integrated circuits for optical applications | May 20, 2002 | Issued |
Array
(
[id] => 1210873
[patent_doc_number] => 06713815
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-03-30
[patent_title] => 'Semiconductor device with transistors that convert a voltage difference into a drain current difference'
[patent_app_type] => B2
[patent_app_number] => 10/147415
[patent_app_country] => US
[patent_app_date] => 2002-05-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/713/06713815.pdf
[firstpage_image] =>[orig_patent_app_number] => 10147415
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/147415 | Semiconductor device with transistors that convert a voltage difference into a drain current difference | May 15, 2002 | Issued |
Array
(
[id] => 5901099
[patent_doc_number] => 20020140080
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-10-03
[patent_title] => 'Two-pole SMT miniature housing for semiconductor components and method for the manufacture thereof'
[patent_app_type] => new
[patent_app_number] => 10/147672
[patent_app_country] => US
[patent_app_date] => 2002-05-15
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0140/20020140080.pdf
[firstpage_image] =>[orig_patent_app_number] => 10147672
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/147672 | Two-pole SMT miniature housing for semiconductor components and method for the manufacture thereof | May 14, 2002 | Issued |
Array
(
[id] => 1374912
[patent_doc_number] => 06566739
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-05-20
[patent_title] => 'Dual chip package'
[patent_app_type] => B2
[patent_app_number] => 10/143071
[patent_app_country] => US
[patent_app_date] => 2002-05-10
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/566/06566739.pdf
[firstpage_image] =>[orig_patent_app_number] => 10143071
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/143071 | Dual chip package | May 9, 2002 | Issued |
Array
(
[id] => 1266563
[patent_doc_number] => 06661089
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-12-09
[patent_title] => 'Semiconductor package which has no resinous flash formed on lead frame and method for manufacturing the same'
[patent_app_type] => B2
[patent_app_number] => 10/137834
[patent_app_country] => US
[patent_app_date] => 2002-05-03
[patent_effective_date] => 0000-00-00
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/661/06661089.pdf
[firstpage_image] =>[orig_patent_app_number] => 10137834
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/137834 | Semiconductor package which has no resinous flash formed on lead frame and method for manufacturing the same | May 2, 2002 | Issued |