Search

Bradley Smith

Examiner (ID: 12315, Phone: (571)272-1884 , Office: P/2817 )

Most Active Art Unit
2817
Art Unit(s)
2829, 2894, 2818, 2817, 2824, 2891
Total Applications
1806
Issued Applications
1488
Pending Applications
116
Abandoned Applications
231

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14690047 [patent_doc_number] => 20190244139 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-08 [patent_title] => USING META-LEARNING FOR AUTOMATIC GRADIENT-BASED HYPERPARAMETER OPTIMIZATION FOR MACHINE LEARNING AND DEEP LEARNING MODELS [patent_app_type] => utility [patent_app_number] => 15/914883 [patent_app_country] => US [patent_app_date] => 2018-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10755 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15914883 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/914883
USING META-LEARNING FOR AUTOMATIC GRADIENT-BASED HYPERPARAMETER OPTIMIZATION FOR MACHINE LEARNING AND DEEP LEARNING MODELS Mar 6, 2018 Abandoned
Array ( [id] => 16238745 [patent_doc_number] => 20200255979 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-13 [patent_title] => GALLIUM NITRIDE CRYSTAL SUBSTRATE [patent_app_type] => utility [patent_app_number] => 16/651716 [patent_app_country] => US [patent_app_date] => 2018-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19127 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -2 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16651716 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/651716
Gallium nitride crystal substrate Feb 22, 2018 Issued
Array ( [id] => 14267753 [patent_doc_number] => 10283448 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-07 [patent_title] => Multiple metal layer semiconductor device and low temperature stacking method of fabricating the same [patent_app_type] => utility [patent_app_number] => 15/887142 [patent_app_country] => US [patent_app_date] => 2018-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 24 [patent_no_of_words] => 4623 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15887142 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/887142
Multiple metal layer semiconductor device and low temperature stacking method of fabricating the same Feb 1, 2018 Issued
Array ( [id] => 14658721 [patent_doc_number] => 20190236489 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-01 [patent_title] => METHOD AND SYSTEM FOR INDUSTRIAL PARTS SEARCH, HARMONIZATION, AND RATIONALIZATION THROUGH DIGITAL TWIN TECHNOLOGY [patent_app_type] => utility [patent_app_number] => 15/883895 [patent_app_country] => US [patent_app_date] => 2018-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6324 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15883895 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/883895
METHOD AND SYSTEM FOR INDUSTRIAL PARTS SEARCH, HARMONIZATION, AND RATIONALIZATION THROUGH DIGITAL TWIN TECHNOLOGY Jan 29, 2018 Abandoned
Array ( [id] => 13755285 [patent_doc_number] => 10170597 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-01-01 [patent_title] => Method for forming flash memory unit [patent_app_type] => utility [patent_app_number] => 15/872998 [patent_app_country] => US [patent_app_date] => 2018-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 5607 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 260 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15872998 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/872998
Method for forming flash memory unit Jan 16, 2018 Issued
Array ( [id] => 15608043 [patent_doc_number] => 10585074 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-10 [patent_title] => Method of fabricating a MEMS and/or NEMS structure comprising at least two elements suspended from a support at different distances from said support [patent_app_type] => utility [patent_app_number] => 15/873136 [patent_app_country] => US [patent_app_date] => 2018-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 33 [patent_no_of_words] => 3716 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15873136 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/873136
Method of fabricating a MEMS and/or NEMS structure comprising at least two elements suspended from a support at different distances from said support Jan 16, 2018 Issued
Array ( [id] => 17409446 [patent_doc_number] => 11250336 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-15 [patent_title] => Distributed and contextualized artificial intelligence inference service [patent_app_type] => utility [patent_app_number] => 15/857087 [patent_app_country] => US [patent_app_date] => 2017-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 17072 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15857087 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/857087
Distributed and contextualized artificial intelligence inference service Dec 27, 2017 Issued
Array ( [id] => 15427613 [patent_doc_number] => 10546745 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-01-28 [patent_title] => Semiconductor processing method [patent_app_type] => utility [patent_app_number] => 15/844905 [patent_app_country] => US [patent_app_date] => 2017-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 8 [patent_no_of_words] => 3678 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15844905 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/844905
Semiconductor processing method Dec 17, 2017 Issued
Array ( [id] => 13293313 [patent_doc_number] => 10157857 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-18 [patent_title] => Methods for fabricating semiconductor shielding structures [patent_app_type] => utility [patent_app_number] => 15/845256 [patent_app_country] => US [patent_app_date] => 2017-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 4548 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15845256 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/845256
Methods for fabricating semiconductor shielding structures Dec 17, 2017 Issued
Array ( [id] => 15234005 [patent_doc_number] => 10504732 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-10 [patent_title] => Impurity diffusion agent composition and method for manufacturing semiconductor substrate [patent_app_type] => utility [patent_app_number] => 15/845015 [patent_app_country] => US [patent_app_date] => 2017-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11793 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15845015 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/845015
Impurity diffusion agent composition and method for manufacturing semiconductor substrate Dec 17, 2017 Issued
Array ( [id] => 13862041 [patent_doc_number] => 10192745 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-01-29 [patent_title] => Method for manufacturing a layer stack from a p+-substrate, a p--layer, an n--layer and a third layer [patent_app_type] => utility [patent_app_number] => 15/845530 [patent_app_country] => US [patent_app_date] => 2017-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2010 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15845530 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/845530
Method for manufacturing a layer stack from a p+-substrate, a p--layer, an n--layer and a third layer Dec 17, 2017 Issued
Array ( [id] => 12872470 [patent_doc_number] => 20180182665 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-28 [patent_title] => Processed Substrate [patent_app_type] => utility [patent_app_number] => 15/845831 [patent_app_country] => US [patent_app_date] => 2017-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4809 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15845831 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/845831
Processed Substrate Dec 17, 2017 Abandoned
Array ( [id] => 15427705 [patent_doc_number] => 10546792 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-01-28 [patent_title] => Method for manufacturing a semiconductor product wafer [patent_app_type] => utility [patent_app_number] => 15/845361 [patent_app_country] => US [patent_app_date] => 2017-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 2749 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15845361 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/845361
Method for manufacturing a semiconductor product wafer Dec 17, 2017 Issued
Array ( [id] => 14475629 [patent_doc_number] => 20190189462 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-20 [patent_title] => SELF-ASSEMBLED MONOLAYERS AS AN ETCHANT IN ATOMIC LAYER ETCHING [patent_app_type] => utility [patent_app_number] => 15/845910 [patent_app_country] => US [patent_app_date] => 2017-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4119 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15845910 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/845910
Self-assembled monolayers as an etchant in atomic layer etching Dec 17, 2017 Issued
Array ( [id] => 12849277 [patent_doc_number] => 20180174932 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-21 [patent_title] => TRANSFER PRINTED DEVICE REPAIR [patent_app_type] => utility [patent_app_number] => 15/845791 [patent_app_country] => US [patent_app_date] => 2017-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7378 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15845791 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/845791
Transfer printed device repair Dec 17, 2017 Issued
Array ( [id] => 12872620 [patent_doc_number] => 20180182715 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-28 [patent_title] => SEMICONDUCTOR PACKAGE MANUFACTURING METHOD [patent_app_type] => utility [patent_app_number] => 15/845803 [patent_app_country] => US [patent_app_date] => 2017-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9175 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -2 [patent_words_short_claim] => 296 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15845803 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/845803
Semiconductor package manufacturing method Dec 17, 2017 Issued
Array ( [id] => 12648306 [patent_doc_number] => 20180107933 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-04-19 [patent_title] => WEB PAGE TRAINING METHOD AND DEVICE, AND SEARCH INTENTION IDENTIFYING METHOD AND DEVICE [patent_app_type] => utility [patent_app_number] => 15/843267 [patent_app_country] => US [patent_app_date] => 2017-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6778 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15843267 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/843267
WEB PAGE TRAINING METHOD AND DEVICE, AND SEARCH INTENTION IDENTIFYING METHOD AND DEVICE Dec 14, 2017 Abandoned
Array ( [id] => 14443547 [patent_doc_number] => 20190179647 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-13 [patent_title] => AUTO THROTTLING OF INPUT DATA AND DATA EXECUTION USING MACHINE LEARNING AND ARTIFICIAL INTELLIGENCE [patent_app_type] => utility [patent_app_number] => 15/840324 [patent_app_country] => US [patent_app_date] => 2017-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6882 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15840324 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/840324
AUTO THROTTLING OF INPUT DATA AND DATA EXECUTION USING MACHINE LEARNING AND ARTIFICIAL INTELLIGENCE Dec 12, 2017 Abandoned
Array ( [id] => 18137210 [patent_doc_number] => 11562899 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-24 [patent_title] => Method for transferring thin layers [patent_app_type] => utility [patent_app_number] => 16/467254 [patent_app_country] => US [patent_app_date] => 2017-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 22 [patent_no_of_words] => 4129 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16467254 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/467254
Method for transferring thin layers Dec 7, 2017 Issued
Array ( [id] => 12596292 [patent_doc_number] => 20180090594 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-29 [patent_title] => Method of Manufacturing a Semiconductor Device Having Electrode Trenches, Isolated Source Zones and Separation Structures [patent_app_type] => utility [patent_app_number] => 15/830789 [patent_app_country] => US [patent_app_date] => 2017-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7408 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15830789 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/830789
Method of manufacturing a semiconductor device having electrode trenches, isolated source zones and separation structures Dec 3, 2017 Issued
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