Search

Bradley Smith

Examiner (ID: 12315, Phone: (571)272-1884 , Office: P/2817 )

Most Active Art Unit
2817
Art Unit(s)
2829, 2894, 2818, 2817, 2824, 2891
Total Applications
1806
Issued Applications
1488
Pending Applications
116
Abandoned Applications
231

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10512767 [patent_doc_number] => 09240347 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-01-19 [patent_title] => 'Tungsten feature fill' [patent_app_type] => utility [patent_app_number] => 14/502817 [patent_app_country] => US [patent_app_date] => 2014-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 43 [patent_no_of_words] => 26644 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14502817 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/502817
Tungsten feature fill Sep 29, 2014 Issued
Array ( [id] => 9895586 [patent_doc_number] => 20150050785 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-02-19 [patent_title] => 'METHOD OF FORMING A COMPLEMENTARY METAL-OXIDESEMICONDUCTOR (CMOS) DEVICE' [patent_app_type] => utility [patent_app_number] => 14/496225 [patent_app_country] => US [patent_app_date] => 2014-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 13776 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14496225 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/496225
Method of forming a complementary metal-oxide-semiconductor (CMOS) device Sep 24, 2014 Issued
Array ( [id] => 10093044 [patent_doc_number] => 09129874 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-09-08 [patent_title] => 'Light sensor having IR cut interference filter with color filter integrated on-chip' [patent_app_type] => utility [patent_app_number] => 14/461561 [patent_app_country] => US [patent_app_date] => 2014-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 5927 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14461561 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/461561
Light sensor having IR cut interference filter with color filter integrated on-chip Aug 17, 2014 Issued
Array ( [id] => 10943419 [patent_doc_number] => 20140346440 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-11-27 [patent_title] => 'LIGHT EMITTING DEVICE AND LIGHT EMITTING DEVICE PACKAGE' [patent_app_type] => utility [patent_app_number] => 14/457384 [patent_app_country] => US [patent_app_date] => 2014-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 9284 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14457384 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/457384
Light emitting device and light emitting device package Aug 11, 2014 Issued
Array ( [id] => 12457419 [patent_doc_number] => 09985011 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-05-29 [patent_title] => Method for producing an optoelectronic semiconductor chip [patent_app_type] => utility [patent_app_number] => 14/912382 [patent_app_country] => US [patent_app_date] => 2014-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 19 [patent_no_of_words] => 5413 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14912382 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/912382
Method for producing an optoelectronic semiconductor chip Aug 7, 2014 Issued
Array ( [id] => 10010531 [patent_doc_number] => 09054056 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-09 [patent_title] => 'Transistor performance using a two-step damage anneal' [patent_app_type] => utility [patent_app_number] => 14/451489 [patent_app_country] => US [patent_app_date] => 2014-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 8 [patent_no_of_words] => 1874 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14451489 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/451489
Transistor performance using a two-step damage anneal Aug 4, 2014 Issued
Array ( [id] => 9983544 [patent_doc_number] => 09029251 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-05-12 [patent_title] => 'Transistor performance using a two-step damage anneal' [patent_app_type] => utility [patent_app_number] => 14/451485 [patent_app_country] => US [patent_app_date] => 2014-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 8 [patent_no_of_words] => 1874 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14451485 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/451485
Transistor performance using a two-step damage anneal Aug 4, 2014 Issued
Array ( [id] => 11681265 [patent_doc_number] => 09679800 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-06-13 [patent_title] => 'Method for manufacturing bonded wafer' [patent_app_type] => utility [patent_app_number] => 14/912679 [patent_app_country] => US [patent_app_date] => 2014-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4089 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14912679 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/912679
Method for manufacturing bonded wafer Jul 31, 2014 Issued
Array ( [id] => 10919870 [patent_doc_number] => 20140322889 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-10-30 [patent_title] => 'HIGH VOLTAGE RESISTOR WITH BIASED-WELL' [patent_app_type] => utility [patent_app_number] => 14/334974 [patent_app_country] => US [patent_app_date] => 2014-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4712 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14334974 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/334974
High voltage resistor with biased-well Jul 17, 2014 Issued
Array ( [id] => 12168330 [patent_doc_number] => 09887101 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-02-06 [patent_title] => 'Method for manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 14/912509 [patent_app_country] => US [patent_app_date] => 2014-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 9598 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14912509 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/912509
Method for manufacturing semiconductor device Jul 7, 2014 Issued
Array ( [id] => 13762015 [patent_doc_number] => 10173338 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-01-08 [patent_title] => Curve cutting with a circular saw blade [patent_app_type] => utility [patent_app_number] => 14/910556 [patent_app_country] => US [patent_app_date] => 2014-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 7830 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14910556 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/910556
Curve cutting with a circular saw blade Jul 6, 2014 Issued
Array ( [id] => 10943634 [patent_doc_number] => 20140346655 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-11-27 [patent_title] => 'MEMORY CELL' [patent_app_type] => utility [patent_app_number] => 14/301443 [patent_app_country] => US [patent_app_date] => 2014-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 5872 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14301443 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/301443
Memory cell Jun 10, 2014 Issued
Array ( [id] => 11000019 [patent_doc_number] => 20160196966 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-07-07 [patent_title] => 'METHOD AND DEVICE FOR POLISHING SEMICONDUCTOR WAFER' [patent_app_type] => utility [patent_app_number] => 14/912426 [patent_app_country] => US [patent_app_date] => 2014-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 8848 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14912426 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/912426
Method and device for polishing semiconductor wafer May 28, 2014 Issued
Array ( [id] => 11645144 [patent_doc_number] => 09666534 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-30 [patent_title] => 'Semiconductor interconnect structure and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 14/276398 [patent_app_country] => US [patent_app_date] => 2014-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 6418 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14276398 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/276398
Semiconductor interconnect structure and manufacturing method thereof May 12, 2014 Issued
Array ( [id] => 10438570 [patent_doc_number] => 20150323583 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-12 [patent_title] => 'METHOD FOR DETECTING AN ELECTRICAL DEFECT OF CONTACT/VIA PLUGS' [patent_app_type] => utility [patent_app_number] => 14/275437 [patent_app_country] => US [patent_app_date] => 2014-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2884 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14275437 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/275437
Method for detecting an electrical defect of contact/via plugs May 11, 2014 Issued
Array ( [id] => 10440675 [patent_doc_number] => 20150325687 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-12 [patent_title] => 'SEMICONDUCTOR DEVICE AND INSULATED GATE BIPOLAR TRANSISTOR WITH SOURCE ZONES FORMED IN SEMICONDUCTOR MESAS' [patent_app_type] => utility [patent_app_number] => 14/275378 [patent_app_country] => US [patent_app_date] => 2014-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 7687 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14275378 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/275378
Semiconductor device and insulated gate bipolar transistor with source zones formed in semiconductor mesas May 11, 2014 Issued
Array ( [id] => 10343551 [patent_doc_number] => 20150228556 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-13 [patent_title] => 'INTEGRATED DEVICE COMPRISING VIA WITH SIDE BARRIER LAYER TRAVERSING ENCAPSULATION LAYER' [patent_app_type] => utility [patent_app_number] => 14/274517 [patent_app_country] => US [patent_app_date] => 2014-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 13489 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14274517 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/274517
Integrated device comprising via with side barrier layer traversing encapsulation layer May 8, 2014 Issued
Array ( [id] => 10440523 [patent_doc_number] => 20150325535 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-12 [patent_title] => 'Method for Processing a Semiconductor Workpiece and Semiconductor Workpiece' [patent_app_type] => utility [patent_app_number] => 14/272535 [patent_app_country] => US [patent_app_date] => 2014-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6760 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14272535 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/272535
Method for processing a semiconductor workpiece and semiconductor workpiece May 7, 2014 Issued
Array ( [id] => 10440649 [patent_doc_number] => 20150325661 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-12 [patent_title] => 'SUBSTRATE FOR MOLECULAR BEAM EPITAXY (MBE) HGCDTE GROWTH' [patent_app_type] => utility [patent_app_number] => 14/271727 [patent_app_country] => US [patent_app_date] => 2014-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1820 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14271727 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/271727
Substrate for molecular beam epitaxy (MBE) HgCdTe growth May 6, 2014 Issued
Array ( [id] => 10440438 [patent_doc_number] => 20150325450 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-12 [patent_title] => 'REWORK AND STRIPPING OF COMPLEX PATTERNING LAYERS USING CHEMICAL MECHANICAL POLISHING' [patent_app_type] => utility [patent_app_number] => 14/270565 [patent_app_country] => US [patent_app_date] => 2014-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3656 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14270565 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/270565
Rework and stripping of complex patterning layers using chemical mechanical polishing May 5, 2014 Issued
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