Search

Bradley Smith

Examiner (ID: 12315, Phone: (571)272-1884 , Office: P/2817 )

Most Active Art Unit
2817
Art Unit(s)
2829, 2894, 2818, 2817, 2824, 2891
Total Applications
1806
Issued Applications
1488
Pending Applications
116
Abandoned Applications
231

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10433248 [patent_doc_number] => 20150318260 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-05 [patent_title] => 'GAS-CONTROLLED BONDING PLATFORM FOR EDGE DEFECT REDUCTION DURING WAFER BONDING' [patent_app_type] => utility [patent_app_number] => 14/269457 [patent_app_country] => US [patent_app_date] => 2014-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4393 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14269457 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/269457
Gas-controlled bonding platform for edge defect reduction during wafer bonding May 4, 2014 Issued
Array ( [id] => 11883629 [patent_doc_number] => 09754810 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-09-05 [patent_title] => 'Method for the production of a wafer with a carrier unit' [patent_app_type] => utility [patent_app_number] => 14/888927 [patent_app_country] => US [patent_app_date] => 2014-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 6846 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14888927 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/888927
Method for the production of a wafer with a carrier unit May 4, 2014 Issued
Array ( [id] => 10106622 [patent_doc_number] => 09142406 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-09-22 [patent_title] => 'III-N material grown on ErAlN buffer on Si substrate' [patent_app_type] => utility [patent_app_number] => 14/269011 [patent_app_country] => US [patent_app_date] => 2014-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2487 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14269011 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/269011
III-N material grown on ErAlN buffer on Si substrate May 1, 2014 Issued
Array ( [id] => 10131951 [patent_doc_number] => 09165793 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-10-20 [patent_title] => 'Making electrical components in handle wafers of integrated circuit packages' [patent_app_type] => utility [patent_app_number] => 14/268899 [patent_app_country] => US [patent_app_date] => 2014-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 4818 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14268899 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/268899
Making electrical components in handle wafers of integrated circuit packages May 1, 2014 Issued
Array ( [id] => 10131951 [patent_doc_number] => 09165793 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-10-20 [patent_title] => 'Making electrical components in handle wafers of integrated circuit packages' [patent_app_type] => utility [patent_app_number] => 14/268899 [patent_app_country] => US [patent_app_date] => 2014-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 4818 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14268899 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/268899
Making electrical components in handle wafers of integrated circuit packages May 1, 2014 Issued
Array ( [id] => 10131951 [patent_doc_number] => 09165793 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-10-20 [patent_title] => 'Making electrical components in handle wafers of integrated circuit packages' [patent_app_type] => utility [patent_app_number] => 14/268899 [patent_app_country] => US [patent_app_date] => 2014-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 4818 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14268899 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/268899
Making electrical components in handle wafers of integrated circuit packages May 1, 2014 Issued
Array ( [id] => 10131951 [patent_doc_number] => 09165793 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-10-20 [patent_title] => 'Making electrical components in handle wafers of integrated circuit packages' [patent_app_type] => utility [patent_app_number] => 14/268899 [patent_app_country] => US [patent_app_date] => 2014-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 4818 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14268899 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/268899
Making electrical components in handle wafers of integrated circuit packages May 1, 2014 Issued
Array ( [id] => 10918469 [patent_doc_number] => 20140321488 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-10-30 [patent_title] => 'Tunable Laser With High Thermal Wavelength Tuning Efficiency' [patent_app_type] => utility [patent_app_number] => 14/266248 [patent_app_country] => US [patent_app_date] => 2014-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5486 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14266248 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/266248
Tunable laser with high thermal wavelength tuning efficiency Apr 29, 2014 Issued
Array ( [id] => 10892872 [patent_doc_number] => 08916484 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-23 [patent_title] => 'Remote plasma radical treatment of silicon oxide' [patent_app_type] => utility [patent_app_number] => 14/255471 [patent_app_country] => US [patent_app_date] => 2014-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 8516 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14255471 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/255471
Remote plasma radical treatment of silicon oxide Apr 16, 2014 Issued
Array ( [id] => 9639435 [patent_doc_number] => 20140217545 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-08-07 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/251210 [patent_app_country] => US [patent_app_date] => 2014-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 9595 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14251210 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/251210
Semiconductor device and method for fabricating the same Apr 10, 2014 Issued
Array ( [id] => 10385229 [patent_doc_number] => 20150270235 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-24 [patent_title] => 'DRY-REMOVABLE PROTECTIVE COATINGS' [patent_app_type] => utility [patent_app_number] => 14/218767 [patent_app_country] => US [patent_app_date] => 2014-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7221 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14218767 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/218767
Dry-removable protective coatings Mar 17, 2014 Issued
Array ( [id] => 10385276 [patent_doc_number] => 20150270284 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-24 [patent_title] => 'JUNCTION BUTTING IN SOI TRANSISTOR WITH EMBEDDED SOURCE/DRAIN' [patent_app_type] => utility [patent_app_number] => 14/217572 [patent_app_country] => US [patent_app_date] => 2014-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5462 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14217572 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/217572
Junction butting in SOI transistor with embedded source/drain Mar 17, 2014 Issued
Array ( [id] => 10158510 [patent_doc_number] => 09190293 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-17 [patent_title] => 'Even tungsten etch for high aspect ratio trenches' [patent_app_type] => utility [patent_app_number] => 14/215417 [patent_app_country] => US [patent_app_date] => 2014-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 8746 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14215417 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/215417
Even tungsten etch for high aspect ratio trenches Mar 16, 2014 Issued
Array ( [id] => 10106671 [patent_doc_number] => 09142454 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-09-22 [patent_title] => 'Semiconductor structure and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 14/215149 [patent_app_country] => US [patent_app_date] => 2014-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 2574 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14215149 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/215149
Semiconductor structure and method for manufacturing the same Mar 16, 2014 Issued
Array ( [id] => 10377905 [patent_doc_number] => 20150262912 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-17 [patent_title] => 'Via Corner Engineering in Trench-First Dual Damascene Process' [patent_app_type] => utility [patent_app_number] => 14/213329 [patent_app_country] => US [patent_app_date] => 2014-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4231 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14213329 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/213329
Via corner engineering in trench-first dual damascene process Mar 13, 2014 Issued
Array ( [id] => 10377878 [patent_doc_number] => 20150262885 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-17 [patent_title] => 'INTEGRATED CIRCUITS WITH STRESSED SEMICONDUCTOR-ON-INSULATOR (SOI) BODY CONTACTS AND METHODS FOR FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/213288 [patent_app_country] => US [patent_app_date] => 2014-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3765 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14213288 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/213288
Integrated circuits with stressed semiconductor-on-insulator (SOI) body contacts and methods for fabricating the same Mar 13, 2014 Issued
Array ( [id] => 10378078 [patent_doc_number] => 20150263085 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-17 [patent_title] => 'SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD OF THE SAME' [patent_app_type] => utility [patent_app_number] => 14/210528 [patent_app_country] => US [patent_app_date] => 2014-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8894 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14210528 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/210528
Semiconductor structure and manufacturing method of the same Mar 13, 2014 Issued
Array ( [id] => 10378161 [patent_doc_number] => 20150263168 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-17 [patent_title] => 'Structure and Method for Semiconductor Device' [patent_app_type] => utility [patent_app_number] => 14/208294 [patent_app_country] => US [patent_app_date] => 2014-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 4990 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14208294 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/208294
Structure and method for semiconductor device Mar 12, 2014 Issued
Array ( [id] => 10377869 [patent_doc_number] => 20150262876 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-17 [patent_title] => 'SEMICONDUCTOR ARRANGEMENT AND FORMATION THEREOF' [patent_app_type] => utility [patent_app_number] => 14/208157 [patent_app_country] => US [patent_app_date] => 2014-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6428 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14208157 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/208157
Semiconductor arrangement and formation thereof Mar 12, 2014 Issued
Array ( [id] => 10525506 [patent_doc_number] => 09252026 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-02-02 [patent_title] => 'Buried trench isolation in integrated circuits' [patent_app_type] => utility [patent_app_number] => 14/207303 [patent_app_country] => US [patent_app_date] => 2014-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 21 [patent_no_of_words] => 4919 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14207303 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/207303
Buried trench isolation in integrated circuits Mar 11, 2014 Issued
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