Search

Brandon S. Cole

Examiner (ID: 5829, Phone: (571)270-5075 , Office: P/2842 )

Most Active Art Unit
2842
Art Unit(s)
2842, 2128, 2816, 2122
Total Applications
1478
Issued Applications
1171
Pending Applications
78
Abandoned Applications
254

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18500300 [patent_doc_number] => 20230223085 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-13 [patent_title] => MEMORY DEVICE, MEMORY SYSTEM, AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/081035 [patent_app_country] => US [patent_app_date] => 2022-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19728 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 302 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18081035 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/081035
Memory device, memory system, and method of operating the same Dec 13, 2022 Issued
Array ( [id] => 19459964 [patent_doc_number] => 12100466 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-24 [patent_title] => Memory device including error correction device [patent_app_type] => utility [patent_app_number] => 18/080282 [patent_app_country] => US [patent_app_date] => 2022-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 10534 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18080282 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/080282
Memory device including error correction device Dec 12, 2022 Issued
Array ( [id] => 18442234 [patent_doc_number] => 20230189530 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-15 [patent_title] => METHODS OF OPERATING FERROELECTRIC (Fe) FET BASED NON-VOLATILE MEMORY CIRCUITS AND RELATED CONTROL CIRCUITS [patent_app_type] => utility [patent_app_number] => 18/063297 [patent_app_country] => US [patent_app_date] => 2022-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5497 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18063297 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/063297
Methods of operating ferroelectric (Fe) FET based non-volatile memory circuits and related control circuits Dec 7, 2022 Issued
Array ( [id] => 18284709 [patent_doc_number] => 20230100181 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-30 [patent_title] => CIRCUIT DESIGN AND LAYOUT WITH HIGH EMBEDDED MEMORY DENSITY [patent_app_type] => utility [patent_app_number] => 18/076801 [patent_app_country] => US [patent_app_date] => 2022-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15083 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18076801 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/076801
Circuit design and layout with high embedded memory density Dec 6, 2022 Issued
Array ( [id] => 18440118 [patent_doc_number] => 20230187413 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-15 [patent_title] => Memory Device Including Arrangement of Independently And Concurrently Operable Tiles of Memory Transistors [patent_app_type] => utility [patent_app_number] => 18/059974 [patent_app_country] => US [patent_app_date] => 2022-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 26915 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -44 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18059974 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/059974
Memory Device Including Arrangement of Independently And Concurrently Operable Tiles of Memory Transistors Nov 28, 2022 Pending
Array ( [id] => 18925213 [patent_doc_number] => 20240028217 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-25 [patent_title] => MEMORY DEVICE AND METHOD OF OPERATING THE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/991212 [patent_app_country] => US [patent_app_date] => 2022-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10045 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17991212 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/991212
Memory device and method of operating the memory device Nov 20, 2022 Issued
Array ( [id] => 18254696 [patent_doc_number] => 20230081735 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-16 [patent_title] => FEEDBACK FOR MULTI-LEVEL SIGNALING IN A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/056520 [patent_app_country] => US [patent_app_date] => 2022-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 23254 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18056520 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/056520
Feedback for multi-level signaling in a memory device Nov 16, 2022 Issued
Array ( [id] => 19175878 [patent_doc_number] => 20240161852 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-16 [patent_title] => ADJUSTING MEMORY POWER CONSUMPTION [patent_app_type] => utility [patent_app_number] => 18/055566 [patent_app_country] => US [patent_app_date] => 2022-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6956 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18055566 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/055566
Adjusting memory power consumption Nov 14, 2022 Issued
Array ( [id] => 19796078 [patent_doc_number] => 12237043 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-25 [patent_title] => Apparatus and method for ZQ calibration [patent_app_type] => utility [patent_app_number] => 17/984757 [patent_app_country] => US [patent_app_date] => 2022-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9145 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17984757 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/984757
Apparatus and method for ZQ calibration Nov 9, 2022 Issued
Array ( [id] => 19163143 [patent_doc_number] => 20240155850 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-09 [patent_title] => Memory Device Implementing Unified Memory Architecture Integrating Multiple Memory Types [patent_app_type] => utility [patent_app_number] => 18/052775 [patent_app_country] => US [patent_app_date] => 2022-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8239 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18052775 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/052775
Memory device implementing unified memory architecture integrating multiple memory types Nov 3, 2022 Issued
Array ( [id] => 18210866 [patent_doc_number] => 20230057128 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-23 [patent_title] => SPIN-ORBIT TORQUE TYPE MAGNETORESISTANCE EFFECT ELEMENT, AND METHOD FOR PRODUCING SPIN-ORBIT TORQUE TYPE MAGNETORESISTANCE EFFECT ELEMENT [patent_app_type] => utility [patent_app_number] => 17/978496 [patent_app_country] => US [patent_app_date] => 2022-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14761 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17978496 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/978496
Spin-orbit torque type magnetoresistance effect element, and method for producing spin-orbit torque type magnetoresistance effect element Oct 31, 2022 Issued
Array ( [id] => 20177610 [patent_doc_number] => 12396376 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-19 [patent_title] => Piezoelectric memory [patent_app_type] => utility [patent_app_number] => 17/978954 [patent_app_country] => US [patent_app_date] => 2022-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 0 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17978954 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/978954
Piezoelectric memory Oct 31, 2022 Issued
Array ( [id] => 18949223 [patent_doc_number] => 11892513 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-06 [patent_title] => Primary alkaline battery with integrated in-cell resistances [patent_app_type] => utility [patent_app_number] => 17/976071 [patent_app_country] => US [patent_app_date] => 2022-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 10341 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17976071 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/976071
Primary alkaline battery with integrated in-cell resistances Oct 27, 2022 Issued
Array ( [id] => 18333320 [patent_doc_number] => 20230125268 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-27 [patent_title] => POWER SUPPLY TRACKING CIRCUITRY FOR EMBEDDED MEMORIES [patent_app_type] => utility [patent_app_number] => 17/966680 [patent_app_country] => US [patent_app_date] => 2022-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11811 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17966680 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/966680
Power supply tracking circuitry for embedded memories Oct 13, 2022 Issued
Array ( [id] => 19100773 [patent_doc_number] => 20240120001 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-11 [patent_title] => PARTITIONED MEMORY ARCHITECTURE WITH SINGLE RESISTOR OR DUAL RESISTOR MEMORY ELEMENTS FOR IN-MEMORY PIPELINE PROCESSING [patent_app_type] => utility [patent_app_number] => 18/045524 [patent_app_country] => US [patent_app_date] => 2022-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15481 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18045524 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/045524
Partitioned memory architecture with single resistor or dual resistor memory elements for in-memory pipeline processing Oct 10, 2022 Issued
Array ( [id] => 18147806 [patent_doc_number] => 20230021663 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-26 [patent_title] => Modified Distribution of Memory Device States [patent_app_type] => utility [patent_app_number] => 17/959029 [patent_app_country] => US [patent_app_date] => 2022-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11370 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17959029 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/959029
Modified distribution of memory device states Oct 2, 2022 Issued
Array ( [id] => 19088006 [patent_doc_number] => 20240114807 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-04 [patent_title] => HEATER FOR PHASE CHANGE MATERIAL MEMORY CELL [patent_app_type] => utility [patent_app_number] => 17/936982 [patent_app_country] => US [patent_app_date] => 2022-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5446 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17936982 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/936982
Heater for phase change material memory cell Sep 29, 2022 Issued
Array ( [id] => 18882596 [patent_doc_number] => 20240005965 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-04 [patent_title] => CIRCUIT FOR RECEIVING DATA, SYSTEM FOR RECEIVING DATA, AND MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/934695 [patent_app_country] => US [patent_app_date] => 2022-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20230 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 560 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17934695 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/934695
Circuit for receiving data, system for receiving data, and memory device Sep 22, 2022 Issued
Array ( [id] => 18623581 [patent_doc_number] => 11756634 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-12 [patent_title] => Semiconductor memory device [patent_app_type] => utility [patent_app_number] => 17/950306 [patent_app_country] => US [patent_app_date] => 2022-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 49 [patent_figures_cnt] => 51 [patent_no_of_words] => 23967 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 267 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17950306 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/950306
Semiconductor memory device Sep 21, 2022 Issued
Array ( [id] => 18455884 [patent_doc_number] => 20230197165 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-22 [patent_title] => SENSING DEVICE FOR NON-VOLATILE MEMORY [patent_app_type] => utility [patent_app_number] => 17/949255 [patent_app_country] => US [patent_app_date] => 2022-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7272 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 241 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17949255 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/949255
Sensing device for non-volatile memory Sep 20, 2022 Issued
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