Search

Brandon S. Cole

Examiner (ID: 2216, Phone: (571)270-5075 , Office: P/2842 )

Most Active Art Unit
2842
Art Unit(s)
2122, 2128, 2816, 2842
Total Applications
1460
Issued Applications
1165
Pending Applications
80
Abandoned Applications
249

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10682243 [patent_doc_number] => 20160028388 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-28 [patent_title] => 'APPARATUS AND METHOD FOR PROCESSING SIGNAL' [patent_app_type] => utility [patent_app_number] => 14/614072 [patent_app_country] => US [patent_app_date] => 2015-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 14996 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14614072 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/614072
Apparatus and method for processing signal Feb 3, 2015 Issued
Array ( [id] => 11926200 [patent_doc_number] => 09793794 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-17 [patent_title] => 'System and method for reducing power loss in switched-capacitor power converters' [patent_app_type] => utility [patent_app_number] => 15/116780 [patent_app_country] => US [patent_app_date] => 2015-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 6616 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15116780 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/116780
System and method for reducing power loss in switched-capacitor power converters Feb 3, 2015 Issued
Array ( [id] => 11247094 [patent_doc_number] => 09473146 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-10-18 [patent_title] => 'Apparatuses and methods for low power counting circuits' [patent_app_type] => utility [patent_app_number] => 14/613192 [patent_app_country] => US [patent_app_date] => 2015-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7846 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14613192 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/613192
Apparatuses and methods for low power counting circuits Feb 2, 2015 Issued
Array ( [id] => 11638625 [patent_doc_number] => 09660615 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-23 [patent_title] => 'Flip-flop devices with clock sharing' [patent_app_type] => utility [patent_app_number] => 14/608723 [patent_app_country] => US [patent_app_date] => 2015-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 2521 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14608723 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/608723
Flip-flop devices with clock sharing Jan 28, 2015 Issued
Array ( [id] => 11334151 [patent_doc_number] => 09525405 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-12-20 [patent_title] => 'Mitigation of common mode disturbances in an H-bridge driver' [patent_app_type] => utility [patent_app_number] => 14/608344 [patent_app_country] => US [patent_app_date] => 2015-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 11418 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14608344 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/608344
Mitigation of common mode disturbances in an H-bridge driver Jan 28, 2015 Issued
Array ( [id] => 10530113 [patent_doc_number] => 09256246 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-02-09 [patent_title] => 'Clock skew compensation with adaptive body biasing in three-dimensional (3D) integrated circuits (ICs) (3DICs)' [patent_app_type] => utility [patent_app_number] => 14/608462 [patent_app_country] => US [patent_app_date] => 2015-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7774 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14608462 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/608462
Clock skew compensation with adaptive body biasing in three-dimensional (3D) integrated circuits (ICs) (3DICs) Jan 28, 2015 Issued
Array ( [id] => 11259997 [patent_doc_number] => 09484912 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-11-01 [patent_title] => 'Resistance element generator and output driver using the same' [patent_app_type] => utility [patent_app_number] => 14/606790 [patent_app_country] => US [patent_app_date] => 2015-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4699 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14606790 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/606790
Resistance element generator and output driver using the same Jan 26, 2015 Issued
Array ( [id] => 11279685 [patent_doc_number] => 09496168 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-11-15 [patent_title] => 'Semiconductor package with via-coupled power transistors' [patent_app_type] => utility [patent_app_number] => 14/605675 [patent_app_country] => US [patent_app_date] => 2015-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 4452 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14605675 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/605675
Semiconductor package with via-coupled power transistors Jan 25, 2015 Issued
Array ( [id] => 10371013 [patent_doc_number] => 20150256019 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-10 [patent_title] => 'KINETIC ENERGY CAPTURE APPARATUS AND SYSTEM' [patent_app_type] => utility [patent_app_number] => 14/605936 [patent_app_country] => US [patent_app_date] => 2015-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3335 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14605936 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/605936
KINETIC ENERGY CAPTURE APPARATUS AND SYSTEM Jan 25, 2015
Array ( [id] => 11346930 [patent_doc_number] => 09531349 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-12-27 [patent_title] => 'System and method for controlling radiated EMI using interleaved frequency switching' [patent_app_type] => utility [patent_app_number] => 14/602939 [patent_app_country] => US [patent_app_date] => 2015-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 5758 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14602939 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/602939
System and method for controlling radiated EMI using interleaved frequency switching Jan 21, 2015 Issued
Array ( [id] => 10356241 [patent_doc_number] => 20150241246 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-27 [patent_title] => 'UNIVERSAL INTERFACE FOR DETECTOR' [patent_app_type] => utility [patent_app_number] => 14/600636 [patent_app_country] => US [patent_app_date] => 2015-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3395 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14600636 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/600636
Universal interface for detector Jan 19, 2015 Issued
Array ( [id] => 10337265 [patent_doc_number] => 20150222270 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-06 [patent_title] => 'FREQUENCY DIVIDING CIRCUIT AND PHASE SYNCHRONIZATION CIRCUIT' [patent_app_type] => utility [patent_app_number] => 14/597639 [patent_app_country] => US [patent_app_date] => 2015-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 13460 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14597639 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/597639
Frequency dividing circuit and phase synchronization circuit Jan 14, 2015 Issued
Array ( [id] => 14739855 [patent_doc_number] => 10389344 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-20 [patent_title] => Voltage supply circuits and controlling methods therefor [patent_app_type] => utility [patent_app_number] => 15/038588 [patent_app_country] => US [patent_app_date] => 2015-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2212 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 273 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15038588 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/038588
Voltage supply circuits and controlling methods therefor Jan 13, 2015 Issued
Array ( [id] => 11005773 [patent_doc_number] => 20160202723 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-07-14 [patent_title] => 'METHOD FOR CALIBRATING A CLOCK SIGNAL GENERATOR IN A REDUCED POWER STATE' [patent_app_type] => utility [patent_app_number] => 14/592146 [patent_app_country] => US [patent_app_date] => 2015-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8194 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14592146 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/592146
Method for calibrating a clock signal generator in a reduced power state Jan 7, 2015 Issued
Array ( [id] => 10230726 [patent_doc_number] => 20150115720 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-04-30 [patent_title] => 'BACKUP BATTERY SYSTEMS FOR TRAFFIC CABINETS' [patent_app_type] => utility [patent_app_number] => 14/591848 [patent_app_country] => US [patent_app_date] => 2015-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5146 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14591848 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/591848
Backup battery systems for traffic cabinets Jan 6, 2015 Issued
Array ( [id] => 11271725 [patent_doc_number] => 20160334272 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-17 [patent_title] => 'OUTPUT-CURRENT DETECTION CHIP FOR DIODE SENSORS, AND DIODE SENSOR DEVICE' [patent_app_type] => utility [patent_app_number] => 15/110177 [patent_app_country] => US [patent_app_date] => 2015-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 14541 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15110177 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/110177
Output-current detection chip for diode sensors, and diode sensor device Jan 6, 2015 Issued
Array ( [id] => 10611653 [patent_doc_number] => 09331705 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-03 [patent_title] => 'Timing adjustment circuit, clock generation circuit, and method for timing adjustment' [patent_app_type] => utility [patent_app_number] => 14/591156 [patent_app_country] => US [patent_app_date] => 2015-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 27 [patent_no_of_words] => 11596 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14591156 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/591156
Timing adjustment circuit, clock generation circuit, and method for timing adjustment Jan 6, 2015 Issued
Array ( [id] => 10403358 [patent_doc_number] => 20150288367 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-08 [patent_title] => 'PHASE LOCKED LOOP HAVING DUAL BANDWIDTH AND METHOD OF OPERATING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/591453 [patent_app_country] => US [patent_app_date] => 2015-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 11344 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14591453 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/591453
Phase locked loop having dual bandwidth and method of operating the same Jan 6, 2015 Issued
Array ( [id] => 11453991 [patent_doc_number] => 09577648 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-02-21 [patent_title] => 'Semiconductor device and method for accurate clock domain synchronization over a wide frequency range' [patent_app_type] => utility [patent_app_number] => 14/588040 [patent_app_country] => US [patent_app_date] => 2014-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 13561 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14588040 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/588040
Semiconductor device and method for accurate clock domain synchronization over a wide frequency range Dec 30, 2014 Issued
14/586266 WIRELESS POWER TRANSMISSION UTILIZING ALTERNATIVE ENERGY SOURCES Dec 29, 2014 Abandoned
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