Search

Brandon S. Cole

Examiner (ID: 2216, Phone: (571)270-5075 , Office: P/2842 )

Most Active Art Unit
2842
Art Unit(s)
2122, 2128, 2816, 2842
Total Applications
1460
Issued Applications
1165
Pending Applications
80
Abandoned Applications
249

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7649264 [patent_doc_number] => 20110298533 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-08 [patent_title] => 'SEMICONDUCTOR DEVICE HAVING A BIAS RESISTOR CIRCUIT' [patent_app_type] => utility [patent_app_number] => 13/045699 [patent_app_country] => US [patent_app_date] => 2011-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4186 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0298/20110298533.pdf [firstpage_image] =>[orig_patent_app_number] => 13045699 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/045699
Semiconductor device having a bias resistor circuit Mar 10, 2011 Issued
Array ( [id] => 10120269 [patent_doc_number] => 09155169 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-10-06 [patent_title] => 'Device for switching on and off lighting systems of a house or a room, offices or buildings, intelligently and automatically by means of detection, without manual intervention' [patent_app_type] => utility [patent_app_number] => 14/002936 [patent_app_country] => US [patent_app_date] => 2011-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 1608 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 278 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14002936 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/002936
Device for switching on and off lighting systems of a house or a room, offices or buildings, intelligently and automatically by means of detection, without manual intervention Mar 2, 2011 Issued
Array ( [id] => 7699052 [patent_doc_number] => 20110227538 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-22 [patent_title] => 'CIRCUITS FOR GENERATING REFERENCE SIGNALS' [patent_app_type] => utility [patent_app_number] => 13/039751 [patent_app_country] => US [patent_app_date] => 2011-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3247 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0227/20110227538.pdf [firstpage_image] =>[orig_patent_app_number] => 13039751 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/039751
CIRCUITS FOR GENERATING REFERENCE SIGNALS Mar 2, 2011 Abandoned
Array ( [id] => 8380133 [patent_doc_number] => 20120223766 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-09-06 [patent_title] => 'INTEGRATED CIRCUITS WITH BI-DIRECTIONAL CHARGE PUMPS' [patent_app_type] => utility [patent_app_number] => 13/038519 [patent_app_country] => US [patent_app_date] => 2011-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 3604 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13038519 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/038519
Integrated circuits with bi-directional charge pumps Mar 1, 2011 Issued
Array ( [id] => 8643467 [patent_doc_number] => 08368458 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-05 [patent_title] => 'Impedance tuning apparatus' [patent_app_type] => utility [patent_app_number] => 13/038387 [patent_app_country] => US [patent_app_date] => 2011-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 4795 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13038387 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/038387
Impedance tuning apparatus Mar 1, 2011 Issued
Array ( [id] => 8368640 [patent_doc_number] => 20120218026 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-30 [patent_title] => 'METHOD OF GENERATING MULTIPLE CURRENT SOURCES FROM A SINGLE REFERENCE RESISTOR' [patent_app_type] => utility [patent_app_number] => 13/036479 [patent_app_country] => US [patent_app_date] => 2011-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4958 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13036479 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/036479
Method of generating multiple current sources from a single reference resistor Feb 27, 2011 Issued
Array ( [id] => 7482390 [patent_doc_number] => 20110234297 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-29 [patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT AND ITS CONTROL TECHNIQUE' [patent_app_type] => utility [patent_app_number] => 13/026241 [patent_app_country] => US [patent_app_date] => 2011-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4227 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0234/20110234297.pdf [firstpage_image] =>[orig_patent_app_number] => 13026241 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/026241
SEMICONDUCTOR INTEGRATED CIRCUIT AND ITS CONTROL TECHNIQUE Feb 11, 2011 Abandoned
Array ( [id] => 9441803 [patent_doc_number] => 08710916 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-29 [patent_title] => 'Electronic circuit having shared leakage current reduction circuits' [patent_app_type] => utility [patent_app_number] => 13/020565 [patent_app_country] => US [patent_app_date] => 2011-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 7530 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13020565 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/020565
Electronic circuit having shared leakage current reduction circuits Feb 2, 2011 Issued
Array ( [id] => 8070521 [patent_doc_number] => 20110241762 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-06 [patent_title] => 'FUSE CIRCUIT' [patent_app_type] => utility [patent_app_number] => 13/013906 [patent_app_country] => US [patent_app_date] => 2011-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2199 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0241/20110241762.pdf [firstpage_image] =>[orig_patent_app_number] => 13013906 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/013906
FUSE CIRCUIT Jan 25, 2011 Abandoned
Array ( [id] => 6053010 [patent_doc_number] => 20110109370 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-12 [patent_title] => 'Level Converter' [patent_app_type] => utility [patent_app_number] => 13/011665 [patent_app_country] => US [patent_app_date] => 2011-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 12313 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0109/20110109370.pdf [firstpage_image] =>[orig_patent_app_number] => 13011665 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/011665
Level converter Jan 20, 2011 Issued
Array ( [id] => 8871342 [patent_doc_number] => 08466721 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-18 [patent_title] => 'Injection locked frequency divider and PLL circuit' [patent_app_type] => utility [patent_app_number] => 13/266160 [patent_app_country] => US [patent_app_date] => 2011-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 8090 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13266160 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/266160
Injection locked frequency divider and PLL circuit Jan 20, 2011 Issued
Array ( [id] => 6162216 [patent_doc_number] => 20110193595 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-11 [patent_title] => 'OUTPUT DRIVER CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/987092 [patent_app_country] => US [patent_app_date] => 2011-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 13813 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0193/20110193595.pdf [firstpage_image] =>[orig_patent_app_number] => 12987092 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/987092
Output driver circuit Jan 7, 2011 Issued
Array ( [id] => 6171122 [patent_doc_number] => 20110175648 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-07-21 [patent_title] => 'PHASE-FREQUENCY COMPARATOR AND SERIAL TRANSMISSION DEVICE' [patent_app_type] => utility [patent_app_number] => 12/987108 [patent_app_country] => US [patent_app_date] => 2011-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7218 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0175/20110175648.pdf [firstpage_image] =>[orig_patent_app_number] => 12987108 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/987108
Phase-frequency comparator and serial transmission device Jan 7, 2011 Issued
Array ( [id] => 8871352 [patent_doc_number] => 08466731 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-18 [patent_title] => 'Method for preventing the over-stress of MV devices' [patent_app_type] => utility [patent_app_number] => 12/986617 [patent_app_country] => US [patent_app_date] => 2011-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3165 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12986617 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/986617
Method for preventing the over-stress of MV devices Jan 6, 2011 Issued
Array ( [id] => 9075190 [patent_doc_number] => 08552772 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-08 [patent_title] => 'Loop filter buffer with level shifter' [patent_app_type] => utility [patent_app_number] => 12/985566 [patent_app_country] => US [patent_app_date] => 2011-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3601 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12985566 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/985566
Loop filter buffer with level shifter Jan 5, 2011 Issued
Array ( [id] => 9711810 [patent_doc_number] => 08836387 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-09-16 [patent_title] => 'Methods and systems for reducing jitter' [patent_app_type] => utility [patent_app_number] => 12/984356 [patent_app_country] => US [patent_app_date] => 2011-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3255 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12984356 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/984356
Methods and systems for reducing jitter Jan 3, 2011 Issued
Array ( [id] => 9246190 [patent_doc_number] => 08610475 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-12-17 [patent_title] => 'Integrated circuit' [patent_app_type] => utility [patent_app_number] => 12/981764 [patent_app_country] => US [patent_app_date] => 2010-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 3542 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12981764 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/981764
Integrated circuit Dec 29, 2010 Issued
Array ( [id] => 6155143 [patent_doc_number] => 20110156775 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-30 [patent_title] => 'PHASE LOCK LOOP DEVICE AND CONTROL METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 12/982438 [patent_app_country] => US [patent_app_date] => 2010-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4219 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0156/20110156775.pdf [firstpage_image] =>[orig_patent_app_number] => 12982438 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/982438
PHASE LOCK LOOP DEVICE AND CONTROL METHOD THEREOF Dec 29, 2010 Abandoned
Array ( [id] => 8560651 [patent_doc_number] => 08334717 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-12-18 [patent_title] => 'Dynamic comparator based comparison system' [patent_app_type] => utility [patent_app_number] => 12/981516 [patent_app_country] => US [patent_app_date] => 2010-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 20 [patent_no_of_words] => 6307 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12981516 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/981516
Dynamic comparator based comparison system Dec 29, 2010 Issued
Array ( [id] => 5933458 [patent_doc_number] => 20110210769 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-01 [patent_title] => 'INTEGRATED CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/982717 [patent_app_country] => US [patent_app_date] => 2010-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4196 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0210/20110210769.pdf [firstpage_image] =>[orig_patent_app_number] => 12982717 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/982717
INTEGRATED CIRCUIT Dec 29, 2010 Abandoned
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