
Brandon S. Cole
Examiner (ID: 2216, Phone: (571)270-5075 , Office: P/2842 )
| Most Active Art Unit | 2842 |
| Art Unit(s) | 2122, 2128, 2816, 2842 |
| Total Applications | 1460 |
| Issued Applications | 1165 |
| Pending Applications | 80 |
| Abandoned Applications | 249 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 5353408
[patent_doc_number] => 20090184752
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-07-23
[patent_title] => 'BIAS CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 12/411104
[patent_app_country] => US
[patent_app_date] => 2009-03-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 8818
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0184/20090184752.pdf
[firstpage_image] =>[orig_patent_app_number] => 12411104
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/411104 | BIAS CIRCUIT | Mar 24, 2009 | Abandoned |
Array
(
[id] => 6437022
[patent_doc_number] => 20100188127
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-07-29
[patent_title] => 'SIGNAL ADJUSTING SYSTEM AND SIGNAL ADJUSTING METHOD'
[patent_app_type] => utility
[patent_app_number] => 12/407760
[patent_app_country] => US
[patent_app_date] => 2009-03-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 4017
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0188/20100188127.pdf
[firstpage_image] =>[orig_patent_app_number] => 12407760
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/407760 | Signal adjusting system and signal adjusting method | Mar 18, 2009 | Issued |
Array
(
[id] => 5365364
[patent_doc_number] => 20090302923
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-12-10
[patent_title] => 'TERMINATED INPUT BUFFER WITH OFFSET CANCELLATION CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 12/395674
[patent_app_country] => US
[patent_app_date] => 2009-03-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2607
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0302/20090302923.pdf
[firstpage_image] =>[orig_patent_app_number] => 12395674
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/395674 | TERMINATED INPUT BUFFER WITH OFFSET CANCELLATION CIRCUIT | Feb 28, 2009 | Abandoned |
Array
(
[id] => 5933482
[patent_doc_number] => 20110210784
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-09-01
[patent_title] => 'RF SWITCHING DEVICE AND METHOD THEREFOR'
[patent_app_type] => utility
[patent_app_number] => 12/934999
[patent_app_country] => US
[patent_app_date] => 2009-02-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2994
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0210/20110210784.pdf
[firstpage_image] =>[orig_patent_app_number] => 12934999
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/934999 | RF switching device and method therefor | Feb 3, 2009 | Issued |
Array
(
[id] => 8295163
[patent_doc_number] => 08222954
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2012-07-17
[patent_title] => 'Method and apparatus for a process, voltage, and temperature variation tolerant semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 12/362412
[patent_app_country] => US
[patent_app_date] => 2009-01-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 5938
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 212
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12362412
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/362412 | Method and apparatus for a process, voltage, and temperature variation tolerant semiconductor device | Jan 28, 2009 | Issued |
Array
(
[id] => 6437062
[patent_doc_number] => 20100188132
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-07-29
[patent_title] => 'METHOD FOR PROVIDING A VERY LOW REFERENCE CURRENT'
[patent_app_type] => utility
[patent_app_number] => 12/361739
[patent_app_country] => US
[patent_app_date] => 2009-01-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3917
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0188/20100188132.pdf
[firstpage_image] =>[orig_patent_app_number] => 12361739
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/361739 | Method for providing a very low reference current | Jan 28, 2009 | Issued |
Array
(
[id] => 7541078
[patent_doc_number] => 08058924
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2011-11-15
[patent_title] => 'Method and apparatus for a process, voltage, and temperature variation tolerant semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 12/361804
[patent_app_country] => US
[patent_app_date] => 2009-01-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 5984
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 167
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/058/08058924.pdf
[firstpage_image] =>[orig_patent_app_number] => 12361804
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/361804 | Method and apparatus for a process, voltage, and temperature variation tolerant semiconductor device | Jan 28, 2009 | Issued |
Array
(
[id] => 6437148
[patent_doc_number] => 20100188142
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-07-29
[patent_title] => 'CIRCUIT FOR AND METHOD OF REDUCING POWER CONSUMPTION IN INPUT PORTS OF AN INTEGRATED CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 12/361014
[patent_app_country] => US
[patent_app_date] => 2009-01-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 5100
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0188/20100188142.pdf
[firstpage_image] =>[orig_patent_app_number] => 12361014
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/361014 | Circuit for and method of reducing power consumption in input ports of an integrated circuit | Jan 27, 2009 | Issued |
Array
(
[id] => 5276061
[patent_doc_number] => 20090128193
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-05-21
[patent_title] => 'FAST, LOW OFFSET GROUND SENSING COMPARATOR'
[patent_app_type] => utility
[patent_app_number] => 12/359737
[patent_app_country] => US
[patent_app_date] => 2009-01-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4190
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0128/20090128193.pdf
[firstpage_image] =>[orig_patent_app_number] => 12359737
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/359737 | Fast, low offset ground sensing comparator | Jan 25, 2009 | Issued |
Array
(
[id] => 7801752
[patent_doc_number] => 08130027
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2012-03-06
[patent_title] => 'Apparatus and method for the detection and compensation of integrated circuit performance variation'
[patent_app_type] => utility
[patent_app_number] => 12/357703
[patent_app_country] => US
[patent_app_date] => 2009-01-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 5862
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 194
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/130/08130027.pdf
[firstpage_image] =>[orig_patent_app_number] => 12357703
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/357703 | Apparatus and method for the detection and compensation of integrated circuit performance variation | Jan 21, 2009 | Issued |
Array
(
[id] => 5353407
[patent_doc_number] => 20090184751
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-07-23
[patent_title] => 'BOOSTED VOLTAGE GENERATOR FOR INCREASING BOOSTING EFFICIENCY ACCORDING TO LOAD AND DISPLAY APPARATUS INCLUDING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 12/355329
[patent_app_country] => US
[patent_app_date] => 2009-01-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 5703
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0184/20090184751.pdf
[firstpage_image] =>[orig_patent_app_number] => 12355329
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/355329 | Boosted voltage generator for increasing boosting efficiency according to load and display apparatus including the same | Jan 15, 2009 | Issued |
Array
(
[id] => 4480379
[patent_doc_number] => 07907003
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-03-15
[patent_title] => 'Method for improving power-supply rejection'
[patent_app_type] => utility
[patent_app_number] => 12/353843
[patent_app_country] => US
[patent_app_date] => 2009-01-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3551
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 123
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/907/07907003.pdf
[firstpage_image] =>[orig_patent_app_number] => 12353843
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/353843 | Method for improving power-supply rejection | Jan 13, 2009 | Issued |
Array
(
[id] => 6610056
[patent_doc_number] => 20100171547
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-07-08
[patent_title] => 'PSEUDO BANDGAP VOLTAGE REFERENCE CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 12/349810
[patent_app_country] => US
[patent_app_date] => 2009-01-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3360
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0171/20100171547.pdf
[firstpage_image] =>[orig_patent_app_number] => 12349810
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/349810 | PSEUDO BANDGAP VOLTAGE REFERENCE CIRCUIT | Jan 6, 2009 | Abandoned |
Array
(
[id] => 5262812
[patent_doc_number] => 20090115497
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-05-07
[patent_title] => 'POWER SOURCE CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 12/348210
[patent_app_country] => US
[patent_app_date] => 2009-01-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 6228
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0115/20090115497.pdf
[firstpage_image] =>[orig_patent_app_number] => 12348210
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/348210 | POWER SOURCE CIRCUIT | Jan 1, 2009 | Abandoned |
Array
(
[id] => 8029707
[patent_doc_number] => 08143940
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-03-27
[patent_title] => 'Internal supply voltage generating circuit and method for generating internal supply voltage'
[patent_app_type] => utility
[patent_app_number] => 12/347605
[patent_app_country] => US
[patent_app_date] => 2008-12-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 8
[patent_no_of_words] => 5709
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 119
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/143/08143940.pdf
[firstpage_image] =>[orig_patent_app_number] => 12347605
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/347605 | Internal supply voltage generating circuit and method for generating internal supply voltage | Dec 30, 2008 | Issued |
Array
(
[id] => 6355382
[patent_doc_number] => 20100073042
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-03-25
[patent_title] => 'SEMICONDUCTOR MEMORY APPARATUS'
[patent_app_type] => utility
[patent_app_number] => 12/347080
[patent_app_country] => US
[patent_app_date] => 2008-12-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4776
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0073/20100073042.pdf
[firstpage_image] =>[orig_patent_app_number] => 12347080
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/347080 | Semiconductor memory apparatus | Dec 30, 2008 | Issued |
Array
(
[id] => 6606005
[patent_doc_number] => 20100033234
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-02-11
[patent_title] => 'INTERNAL VOLTAGE GENERATION CIRCUIT AND METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 12/346808
[patent_app_country] => US
[patent_app_date] => 2008-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3530
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0033/20100033234.pdf
[firstpage_image] =>[orig_patent_app_number] => 12346808
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/346808 | Internal voltage generation circuit and method thereof | Dec 29, 2008 | Issued |
Array
(
[id] => 6606002
[patent_doc_number] => 20100033233
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-02-11
[patent_title] => 'PUMPING VOLTAGE GENERATING CIRCUIT AND SEMICONDUCTOR MEMORY APPARATUS USING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 12/345075
[patent_app_country] => US
[patent_app_date] => 2008-12-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4421
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0033/20100033233.pdf
[firstpage_image] =>[orig_patent_app_number] => 12345075
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/345075 | Pumping voltage generating circuit and semiconductor memory apparatus using the same | Dec 28, 2008 | Issued |
Array
(
[id] => 7742360
[patent_doc_number] => 08106704
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-01-31
[patent_title] => 'Apparatus and method for preventing excessive increase in pumping voltage when generating pumping voltage'
[patent_app_type] => utility
[patent_app_number] => 12/344650
[patent_app_country] => US
[patent_app_date] => 2008-12-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 8
[patent_no_of_words] => 4297
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 198
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/106/08106704.pdf
[firstpage_image] =>[orig_patent_app_number] => 12344650
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/344650 | Apparatus and method for preventing excessive increase in pumping voltage when generating pumping voltage | Dec 28, 2008 | Issued |
Array
(
[id] => 7505479
[patent_doc_number] => 08035440
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-10-11
[patent_title] => 'Multistage charge pumps with diode loss compensation'
[patent_app_type] => utility
[patent_app_number] => 12/345255
[patent_app_country] => US
[patent_app_date] => 2008-12-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 3501
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 107
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/035/08035440.pdf
[firstpage_image] =>[orig_patent_app_number] => 12345255
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/345255 | Multistage charge pumps with diode loss compensation | Dec 28, 2008 | Issued |