Search

Brandon S. Cole

Examiner (ID: 2216, Phone: (571)270-5075 , Office: P/2842 )

Most Active Art Unit
2842
Art Unit(s)
2122, 2128, 2816, 2842
Total Applications
1460
Issued Applications
1165
Pending Applications
80
Abandoned Applications
249

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5346703 [patent_doc_number] => 20090002064 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-01 [patent_title] => 'CHARGE PUMP CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/137815 [patent_app_country] => US [patent_app_date] => 2008-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3215 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0002/20090002064.pdf [firstpage_image] =>[orig_patent_app_number] => 12137815 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/137815
Charge pump circuit with control circuitry Jun 11, 2008 Issued
Array ( [id] => 5499802 [patent_doc_number] => 20090160490 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-25 [patent_title] => 'REFERENCE VOLTAGE GENERATOR OF ANALOG-TO-DIGITAL CONVERTER' [patent_app_type] => utility [patent_app_number] => 12/137672 [patent_app_country] => US [patent_app_date] => 2008-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3349 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0160/20090160490.pdf [firstpage_image] =>[orig_patent_app_number] => 12137672 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/137672
REFERENCE VOLTAGE GENERATOR OF ANALOG-TO-DIGITAL CONVERTER Jun 11, 2008 Abandoned
Array ( [id] => 5365345 [patent_doc_number] => 20090302904 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-10 [patent_title] => 'Phase Frequency Detector Circuit for Implementing Low PLL Phase Noise and Low Phase Error' [patent_app_type] => utility [patent_app_number] => 12/136218 [patent_app_country] => US [patent_app_date] => 2008-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3634 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0302/20090302904.pdf [firstpage_image] =>[orig_patent_app_number] => 12136218 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/136218
Phase Frequency Detector Circuit for Implementing Low PLL Phase Noise and Low Phase Error Jun 9, 2008 Abandoned
Array ( [id] => 4572798 [patent_doc_number] => 07847620 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-12-07 [patent_title] => 'Charge pumping circuit with decreased current consumption' [patent_app_type] => utility [patent_app_number] => 12/136429 [patent_app_country] => US [patent_app_date] => 2008-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2013 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/847/07847620.pdf [firstpage_image] =>[orig_patent_app_number] => 12136429 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/136429
Charge pumping circuit with decreased current consumption Jun 9, 2008 Issued
Array ( [id] => 5365371 [patent_doc_number] => 20090302930 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-10 [patent_title] => 'Charge Pump with Vt Cancellation Through Parallel Structure' [patent_app_type] => utility [patent_app_number] => 12/135945 [patent_app_country] => US [patent_app_date] => 2008-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3033 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0302/20090302930.pdf [firstpage_image] =>[orig_patent_app_number] => 12135945 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/135945
Charge Pump with Vt Cancellation Through Parallel Structure Jun 8, 2008 Abandoned
Array ( [id] => 4708706 [patent_doc_number] => 20080297232 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-04 [patent_title] => 'CHARGE PUMP CIRCUIT AND SLICE LEVEL CONTROL CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/132996 [patent_app_country] => US [patent_app_date] => 2008-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3144 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0297/20080297232.pdf [firstpage_image] =>[orig_patent_app_number] => 12132996 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/132996
Charge pump circuit and slice level control circuit Jun 3, 2008 Issued
Array ( [id] => 6115748 [patent_doc_number] => 20110074476 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-31 [patent_title] => 'APPARATUS FOR LOCK-IN AMPLIFYING AN INPUT SIGNAL AND METHOD FOR GENERATING A REFERENCE SIGNAL FOR A LOCK-IN AMPLIFIER' [patent_app_type] => utility [patent_app_number] => 12/993884 [patent_app_country] => US [patent_app_date] => 2008-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4340 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0074/20110074476.pdf [firstpage_image] =>[orig_patent_app_number] => 12993884 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/993884
APPARATUS FOR LOCK-IN AMPLIFYING AN INPUT SIGNAL AND METHOD FOR GENERATING A REFERENCE SIGNAL FOR A LOCK-IN AMPLIFIER May 26, 2008 Abandoned
Array ( [id] => 4789951 [patent_doc_number] => 20080290924 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-27 [patent_title] => 'METHOD AND APPARATUS FOR PROGRAMMABLE DELAY HAVING FINE DELAY RESOLUTION' [patent_app_type] => utility [patent_app_number] => 12/116516 [patent_app_country] => US [patent_app_date] => 2008-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5130 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0290/20080290924.pdf [firstpage_image] =>[orig_patent_app_number] => 12116516 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/116516
METHOD AND APPARATUS FOR PROGRAMMABLE DELAY HAVING FINE DELAY RESOLUTION May 6, 2008 Abandoned
Array ( [id] => 4708693 [patent_doc_number] => 20080297219 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-04 [patent_title] => 'EQUAL DELAY FLIP-FLOP BASED ON LOCALIZED FEEDBACK PATHS' [patent_app_type] => utility [patent_app_number] => 12/107789 [patent_app_country] => US [patent_app_date] => 2008-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4483 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0297/20080297219.pdf [firstpage_image] =>[orig_patent_app_number] => 12107789 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/107789
EQUAL DELAY FLIP-FLOP BASED ON LOCALIZED FEEDBACK PATHS Apr 22, 2008 Abandoned
Array ( [id] => 6306180 [patent_doc_number] => 20100109755 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-05-06 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/595596 [patent_app_country] => US [patent_app_date] => 2008-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4499 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0109/20100109755.pdf [firstpage_image] =>[orig_patent_app_number] => 12595596 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/595596
SEMICONDUCTOR DEVICE Apr 10, 2008 Abandoned
Array ( [id] => 6241543 [patent_doc_number] => 20100134154 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-06-03 [patent_title] => 'ODD NUMBER FREQUENCY DIVIDING CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/450629 [patent_app_country] => US [patent_app_date] => 2008-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3941 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0134/20100134154.pdf [firstpage_image] =>[orig_patent_app_number] => 12450629 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/450629
ODD NUMBER FREQUENCY DIVIDING CIRCUIT Mar 26, 2008 Abandoned
Array ( [id] => 4605192 [patent_doc_number] => 07986175 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-07-26 [patent_title] => 'Spread spectrum control PLL circuit and its start-up method' [patent_app_type] => utility [patent_app_number] => 12/595008 [patent_app_country] => US [patent_app_date] => 2008-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 8055 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 314 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/986/07986175.pdf [firstpage_image] =>[orig_patent_app_number] => 12595008 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/595008
Spread spectrum control PLL circuit and its start-up method Mar 17, 2008 Issued
Array ( [id] => 6306161 [patent_doc_number] => 20100109746 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-05-06 [patent_title] => 'SAMPLING MIXER, FILTER DEVICE, AND RADIO DEVICE' [patent_app_type] => utility [patent_app_number] => 12/532530 [patent_app_country] => US [patent_app_date] => 2008-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6232 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0109/20100109746.pdf [firstpage_image] =>[orig_patent_app_number] => 12532530 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/532530
Sampling mixer, filter device, and radio device Mar 16, 2008 Issued
Array ( [id] => 4715976 [patent_doc_number] => 20080238498 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-02 [patent_title] => 'CLOCK GENERATOR, METHOD FOR GENERATING CLOCK SIGNAL AND FRACTIONAL PHASE LOCK LOOP THEREOF' [patent_app_type] => utility [patent_app_number] => 12/046527 [patent_app_country] => US [patent_app_date] => 2008-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3222 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0238/20080238498.pdf [firstpage_image] =>[orig_patent_app_number] => 12046527 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/046527
Clock generator, method for generating clock signal and fractional phase lock loop thereof Mar 11, 2008 Issued
Array ( [id] => 5573421 [patent_doc_number] => 20090140782 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-04 [patent_title] => 'SPREAD SPECTRUM CLOCK GENERATING APPARATUS' [patent_app_type] => utility [patent_app_number] => 12/045712 [patent_app_country] => US [patent_app_date] => 2008-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 6864 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0140/20090140782.pdf [firstpage_image] =>[orig_patent_app_number] => 12045712 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/045712
Spread spectrum clock generating apparatus Mar 10, 2008 Issued
Array ( [id] => 93590 [patent_doc_number] => 07737743 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-06-15 [patent_title] => 'Phase-locked loop including sampling phase detector and charge pump with pulse width control' [patent_app_type] => utility [patent_app_number] => 12/044522 [patent_app_country] => US [patent_app_date] => 2008-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 2724 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/737/07737743.pdf [firstpage_image] =>[orig_patent_app_number] => 12044522 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/044522
Phase-locked loop including sampling phase detector and charge pump with pulse width control Mar 6, 2008 Issued
Array ( [id] => 5499806 [patent_doc_number] => 20090160494 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-25 [patent_title] => 'OUTPUT DRIVING CIRCUITS' [patent_app_type] => utility [patent_app_number] => 12/043699 [patent_app_country] => US [patent_app_date] => 2008-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2466 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0160/20090160494.pdf [firstpage_image] =>[orig_patent_app_number] => 12043699 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/043699
Output driving circuits Mar 5, 2008 Issued
Array ( [id] => 260575 [patent_doc_number] => 07573305 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-08-11 [patent_title] => 'High speed divider circuit' [patent_app_type] => utility [patent_app_number] => 12/041085 [patent_app_country] => US [patent_app_date] => 2008-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 1764 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/573/07573305.pdf [firstpage_image] =>[orig_patent_app_number] => 12041085 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/041085
High speed divider circuit Mar 2, 2008 Issued
Array ( [id] => 83282 [patent_doc_number] => 07746164 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-29 [patent_title] => 'Voltage generating circuit' [patent_app_type] => utility [patent_app_number] => 12/027699 [patent_app_country] => US [patent_app_date] => 2008-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 7122 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 295 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/746/07746164.pdf [firstpage_image] =>[orig_patent_app_number] => 12027699 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/027699
Voltage generating circuit Feb 6, 2008 Issued
Array ( [id] => 5525210 [patent_doc_number] => 20090195287 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-06 [patent_title] => 'APPARATUS AND METHOD FOR EXTERNAL TO INTERNAL CLOCK GENERATION' [patent_app_type] => utility [patent_app_number] => 12/027124 [patent_app_country] => US [patent_app_date] => 2008-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7468 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0195/20090195287.pdf [firstpage_image] =>[orig_patent_app_number] => 12027124 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/027124
Apparatus and method for external to internal clock generation Feb 5, 2008 Issued
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