Search

Brenda H Pham

Examiner (ID: 5012)

Most Active Art Unit
2412
Art Unit(s)
2414, 2731, 2616, 2464, 2412, 2416, 2664
Total Applications
2244
Issued Applications
1916
Pending Applications
153
Abandoned Applications
153

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3802177 [patent_doc_number] => 05810945 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-22 [patent_title] => 'Method of fabricating an electronic micropatterned electrode device' [patent_app_type] => 1 [patent_app_number] => 8/545781 [patent_app_country] => US [patent_app_date] => 1996-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 14 [patent_no_of_words] => 4397 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/810/05810945.pdf [firstpage_image] =>[orig_patent_app_number] => 545781 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/545781
Method of fabricating an electronic micropatterned electrode device Mar 13, 1996 Issued
Array ( [id] => 3660709 [patent_doc_number] => 05656550 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-12 [patent_title] => 'Method of producing a semicondutor device having a lead portion with outer connecting terminal' [patent_app_type] => 1 [patent_app_number] => 8/611007 [patent_app_country] => US [patent_app_date] => 1996-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 53 [patent_figures_cnt] => 136 [patent_no_of_words] => 21962 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/656/05656550.pdf [firstpage_image] =>[orig_patent_app_number] => 611007 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/611007
Method of producing a semicondutor device having a lead portion with outer connecting terminal Mar 4, 1996 Issued
Array ( [id] => 3876828 [patent_doc_number] => 05728606 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-17 [patent_title] => 'Electronic Package' [patent_app_type] => 1 [patent_app_number] => 8/611299 [patent_app_country] => US [patent_app_date] => 1996-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5747 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/728/05728606.pdf [firstpage_image] =>[orig_patent_app_number] => 611299 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/611299
Electronic Package Mar 4, 1996 Issued
Array ( [id] => 3828142 [patent_doc_number] => 05739055 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-14 [patent_title] => 'Method for preparing a substrate for a semiconductor package' [patent_app_type] => 1 [patent_app_number] => 8/608503 [patent_app_country] => US [patent_app_date] => 1996-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 1645 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/739/05739055.pdf [firstpage_image] =>[orig_patent_app_number] => 608503 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/608503
Method for preparing a substrate for a semiconductor package Feb 27, 1996 Issued
Array ( [id] => 3760350 [patent_doc_number] => 05741725 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-21 [patent_title] => 'Fabrication process for semiconductor device having MOS type field effect transistor' [patent_app_type] => 1 [patent_app_number] => 8/607301 [patent_app_country] => US [patent_app_date] => 1996-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 24 [patent_no_of_words] => 6027 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/741/05741725.pdf [firstpage_image] =>[orig_patent_app_number] => 607301 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/607301
Fabrication process for semiconductor device having MOS type field effect transistor Feb 25, 1996 Issued
Array ( [id] => 3884350 [patent_doc_number] => 05776801 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-07 [patent_title] => 'Leadframe having contact pads defined by a polymer insulating film' [patent_app_type] => 1 [patent_app_number] => 8/606513 [patent_app_country] => US [patent_app_date] => 1996-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 2235 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/776/05776801.pdf [firstpage_image] =>[orig_patent_app_number] => 606513 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/606513
Leadframe having contact pads defined by a polymer insulating film Feb 22, 1996 Issued
Array ( [id] => 3769877 [patent_doc_number] => 05756378 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-26 [patent_title] => 'Method of and apparatus for laser processing' [patent_app_type] => 1 [patent_app_number] => 8/604809 [patent_app_country] => US [patent_app_date] => 1996-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 20 [patent_no_of_words] => 7908 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/756/05756378.pdf [firstpage_image] =>[orig_patent_app_number] => 604809 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/604809
Method of and apparatus for laser processing Feb 22, 1996 Issued
Array ( [id] => 3742625 [patent_doc_number] => 05801074 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-01 [patent_title] => 'Method of making an air tight cavity in an assembly package' [patent_app_type] => 1 [patent_app_number] => 8/603377 [patent_app_country] => US [patent_app_date] => 1996-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 24 [patent_no_of_words] => 5796 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/801/05801074.pdf [firstpage_image] =>[orig_patent_app_number] => 603377 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/603377
Method of making an air tight cavity in an assembly package Feb 19, 1996 Issued
Array ( [id] => 3869768 [patent_doc_number] => 05763297 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-09 [patent_title] => 'Integrated circuit carrier having lead-socket array with various inner dimensions' [patent_app_type] => 1 [patent_app_number] => 8/597113 [patent_app_country] => US [patent_app_date] => 1996-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 1601 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/763/05763297.pdf [firstpage_image] =>[orig_patent_app_number] => 597113 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/597113
Integrated circuit carrier having lead-socket array with various inner dimensions Feb 5, 1996 Issued
Array ( [id] => 3694852 [patent_doc_number] => 05661083 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-26 [patent_title] => 'Method for via formation with reduced contact resistance' [patent_app_type] => 1 [patent_app_number] => 8/594010 [patent_app_country] => US [patent_app_date] => 1996-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3522 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/661/05661083.pdf [firstpage_image] =>[orig_patent_app_number] => 594010 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/594010
Method for via formation with reduced contact resistance Jan 29, 1996 Issued
08/593025 METHOD FOR FORMING BUMPS ON A SEMICONDUCTOR DIE USING ALUMINUM WIRE Jan 28, 1996 Abandoned
Array ( [id] => 3773829 [patent_doc_number] => 05817545 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-06 [patent_title] => 'Pressurized underfill encapsulation of integrated circuits' [patent_app_type] => 1 [patent_app_number] => 8/590585 [patent_app_country] => US [patent_app_date] => 1996-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 14 [patent_no_of_words] => 5809 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/817/05817545.pdf [firstpage_image] =>[orig_patent_app_number] => 590585 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/590585
Pressurized underfill encapsulation of integrated circuits Jan 23, 1996 Issued
Array ( [id] => 3759442 [patent_doc_number] => 05843809 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-01 [patent_title] => 'Lead frames for trench drams' [patent_app_type] => 1 [patent_app_number] => 8/590527 [patent_app_country] => US [patent_app_date] => 1996-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3862 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/843/05843809.pdf [firstpage_image] =>[orig_patent_app_number] => 590527 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/590527
Lead frames for trench drams Jan 23, 1996 Issued
Array ( [id] => 3723107 [patent_doc_number] => 05672550 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-30 [patent_title] => 'Method of encapsulating semiconductor devices using a lead frame with resin tablets arranged on lead frame' [patent_app_type] => 1 [patent_app_number] => 8/584449 [patent_app_country] => US [patent_app_date] => 1996-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 3640 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/672/05672550.pdf [firstpage_image] =>[orig_patent_app_number] => 584449 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/584449
Method of encapsulating semiconductor devices using a lead frame with resin tablets arranged on lead frame Jan 9, 1996 Issued
Array ( [id] => 3876891 [patent_doc_number] => 05804456 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-08 [patent_title] => 'Method and apparatus for chemically generating terminal bumps on semiconductor wafers' [patent_app_type] => 1 [patent_app_number] => 8/578691 [patent_app_country] => US [patent_app_date] => 1995-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1468 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/804/05804456.pdf [firstpage_image] =>[orig_patent_app_number] => 578691 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/578691
Method and apparatus for chemically generating terminal bumps on semiconductor wafers Dec 27, 1995 Issued
Array ( [id] => 3694756 [patent_doc_number] => 05618754 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-04-08 [patent_title] => 'Method of fabricating a semiconductor device having an Au electrode' [patent_app_type] => 1 [patent_app_number] => 8/576403 [patent_app_country] => US [patent_app_date] => 1995-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 3689 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/618/05618754.pdf [firstpage_image] =>[orig_patent_app_number] => 576403 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/576403
Method of fabricating a semiconductor device having an Au electrode Dec 20, 1995 Issued
Array ( [id] => 3875459 [patent_doc_number] => 05747384 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-05 [patent_title] => 'Process of forming a refractory metal thin film' [patent_app_type] => 1 [patent_app_number] => 8/576685 [patent_app_country] => US [patent_app_date] => 1995-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 6324 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/747/05747384.pdf [firstpage_image] =>[orig_patent_app_number] => 576685 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/576685
Process of forming a refractory metal thin film Dec 20, 1995 Issued
Array ( [id] => 3812515 [patent_doc_number] => 05710071 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-01-20 [patent_title] => 'Process for underfilling a flip-chip semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/566754 [patent_app_country] => US [patent_app_date] => 1995-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 7549 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/710/05710071.pdf [firstpage_image] =>[orig_patent_app_number] => 566754 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/566754
Process for underfilling a flip-chip semiconductor device Dec 3, 1995 Issued
Array ( [id] => 3785811 [patent_doc_number] => 05736429 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-07 [patent_title] => 'Method of forming a layer of silica to be eliminated subsequently and method for mounting an integrated optical component' [patent_app_type] => 1 [patent_app_number] => 8/566122 [patent_app_country] => US [patent_app_date] => 1995-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 9 [patent_no_of_words] => 1515 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/736/05736429.pdf [firstpage_image] =>[orig_patent_app_number] => 566122 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/566122
Method of forming a layer of silica to be eliminated subsequently and method for mounting an integrated optical component Nov 30, 1995 Issued
Array ( [id] => 3701363 [patent_doc_number] => 05674785 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-10-07 [patent_title] => 'Method of producing a single piece package for semiconductor die' [patent_app_type] => 1 [patent_app_number] => 8/563191 [patent_app_country] => US [patent_app_date] => 1995-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 25 [patent_no_of_words] => 5784 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 25 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/674/05674785.pdf [firstpage_image] =>[orig_patent_app_number] => 563191 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/563191
Method of producing a single piece package for semiconductor die Nov 26, 1995 Issued
Menu