Search

Brian Handville

Examiner (ID: 5222, Phone: (571)272-5074 , Office: P/1783 )

Most Active Art Unit
1783
Art Unit(s)
1783
Total Applications
643
Issued Applications
287
Pending Applications
114
Abandoned Applications
267

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19484309 [patent_doc_number] => 20240332351 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => CAPACITOR STRUCTURE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/743906 [patent_app_country] => US [patent_app_date] => 2024-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5780 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18743906 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/743906
CAPACITOR STRUCTURE AND METHOD FOR MANUFACTURING THE SAME Jun 13, 2024 Pending
Array ( [id] => 19452854 [patent_doc_number] => 20240312984 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => Carbon and/or Oxygen Doped Polysilicon Resistor [patent_app_type] => utility [patent_app_number] => 18/677190 [patent_app_country] => US [patent_app_date] => 2024-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4047 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 35 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18677190 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/677190
Carbon and/or Oxygen Doped Polysilicon Resistor May 28, 2024 Pending
Array ( [id] => 20470968 [patent_doc_number] => 12527014 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-13 [patent_title] => Amorphous bottom electrode structure for MIM capacitors [patent_app_type] => utility [patent_app_number] => 18/664389 [patent_app_country] => US [patent_app_date] => 2024-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 39 [patent_no_of_words] => 9306 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18664389 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/664389
Amorphous bottom electrode structure for MIM capacitors May 14, 2024 Issued
Array ( [id] => 19407030 [patent_doc_number] => 20240290541 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-29 [patent_title] => INTEGRATION SCHEME FOR BREAKDOWN VOLTAGE ENHANCEMENT OF A PIEZOELECTRIC METAL-INSULATOR-METAL DEVICE [patent_app_type] => utility [patent_app_number] => 18/659337 [patent_app_country] => US [patent_app_date] => 2024-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6677 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18659337 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/659337
INTEGRATION SCHEME FOR BREAKDOWN VOLTAGE ENHANCEMENT OF A PIEZOELECTRIC METAL-INSULATOR-METAL DEVICE May 8, 2024 Pending
Array ( [id] => 19407140 [patent_doc_number] => 20240290651 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-29 [patent_title] => SELF-ASSEMBLED GUIDED HOLE AND VIA PATTERNING OVER GRATING [patent_app_type] => utility [patent_app_number] => 18/655567 [patent_app_country] => US [patent_app_date] => 2024-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17889 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18655567 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/655567
SELF-ASSEMBLED GUIDED HOLE AND VIA PATTERNING OVER GRATING May 5, 2024 Issued
Array ( [id] => 20134039 [patent_doc_number] => 12376370 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-29 [patent_title] => Control of locos structure thickness without a mask [patent_app_type] => utility [patent_app_number] => 18/632439 [patent_app_country] => US [patent_app_date] => 2024-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 1165 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18632439 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/632439
Control of locos structure thickness without a mask Apr 10, 2024 Issued
Array ( [id] => 20113170 [patent_doc_number] => 12363925 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-15 [patent_title] => Schottky barrier diode with reduced leakage current and method of forming the same [patent_app_type] => utility [patent_app_number] => 18/629967 [patent_app_country] => US [patent_app_date] => 2024-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 5728 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18629967 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/629967
Schottky barrier diode with reduced leakage current and method of forming the same Apr 8, 2024 Issued
Array ( [id] => 20268668 [patent_doc_number] => 12439681 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-07 [patent_title] => Semiconductor device and method for fabricating the same [patent_app_type] => utility [patent_app_number] => 18/613151 [patent_app_country] => US [patent_app_date] => 2024-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 0 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18613151 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/613151
Semiconductor device and method for fabricating the same Mar 21, 2024 Issued
Array ( [id] => 19966698 [patent_doc_number] => 12336236 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-17 [patent_title] => Semiconductor device isolation features [patent_app_type] => utility [patent_app_number] => 18/442794 [patent_app_country] => US [patent_app_date] => 2024-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 47 [patent_no_of_words] => 12265 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18442794 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/442794
Semiconductor device isolation features Feb 14, 2024 Issued
Array ( [id] => 20469409 [patent_doc_number] => 12525451 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-13 [patent_title] => Methods for depositing an oxide film on a substrate by a cyclical deposition process and related device structures [patent_app_type] => utility [patent_app_number] => 18/440452 [patent_app_country] => US [patent_app_date] => 2024-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 6003 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18440452 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/440452
Methods for depositing an oxide film on a substrate by a cyclical deposition process and related device structures Feb 12, 2024 Issued
Array ( [id] => 19221664 [patent_doc_number] => 20240186368 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-06 [patent_title] => SEMICONDUCTOR DEVICES INCLUDING CAPACITOR AND METHODS OF MANUFACTURING THE SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 18/434954 [patent_app_country] => US [patent_app_date] => 2024-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8317 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18434954 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/434954
Semiconductor devices including capacitor and methods of manufacturing the semiconductor devices Feb 6, 2024 Issued
Array ( [id] => 19269464 [patent_doc_number] => 20240213168 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-27 [patent_title] => SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/434711 [patent_app_country] => US [patent_app_date] => 2024-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8674 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18434711 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/434711
Semiconductor package and method of manufacturing the same Feb 5, 2024 Issued
Array ( [id] => 19146284 [patent_doc_number] => 20240145313 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-02 [patent_title] => MULTI-FIN VERTICAL FIELD EFFECT TRANSISTOR AND SINGLE-FIN VERTICAL FIELD EFFECT TRANSISTOR ON A SINGLE INTEGRATED CIRCUIT CHIP [patent_app_type] => utility [patent_app_number] => 18/407020 [patent_app_country] => US [patent_app_date] => 2024-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11745 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18407020 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/407020
Multi-fin vertical field effect transistor and single-fin vertical field effect transistor on a single integrated circuit chip Jan 7, 2024 Issued
Array ( [id] => 19161251 [patent_doc_number] => 20240153958 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-09 [patent_title] => SEMICONDUCTOR DEVICE STRUCTURE AND METHODS OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/406155 [patent_app_country] => US [patent_app_date] => 2024-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11953 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18406155 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/406155
Semiconductor device structure and methods of forming the same Jan 6, 2024 Issued
Array ( [id] => 19928270 [patent_doc_number] => 12302581 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-13 [patent_title] => Semiconductor memory device and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 18/398378 [patent_app_country] => US [patent_app_date] => 2023-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 1169 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18398378 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/398378
Semiconductor memory device and method of manufacturing the same Dec 27, 2023 Issued
Array ( [id] => 19071094 [patent_doc_number] => 20240105520 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-28 [patent_title] => TRENCH PLUG HARDMASK FOR ADVANCED INTEGRATED CIRCUIT STRUCTURE FABRICATION [patent_app_type] => utility [patent_app_number] => 18/534219 [patent_app_country] => US [patent_app_date] => 2023-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 73447 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18534219 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/534219
Trench plug hardmask for advanced integrated circuit structure fabrication Dec 7, 2023 Issued
Array ( [id] => 19741284 [patent_doc_number] => 12218130 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-04 [patent_title] => Semiconductor structure cutting process and structures formed thereby [patent_app_type] => utility [patent_app_number] => 18/526290 [patent_app_country] => US [patent_app_date] => 2023-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 53 [patent_figures_cnt] => 69 [patent_no_of_words] => 10675 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18526290 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/526290
Semiconductor structure cutting process and structures formed thereby Nov 30, 2023 Issued
Array ( [id] => 20361752 [patent_doc_number] => 12477770 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-18 [patent_title] => Group III-nitride high-electron mobility transistors with buried p-type layers and process for making the same [patent_app_type] => utility [patent_app_number] => 18/523174 [patent_app_country] => US [patent_app_date] => 2023-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 35 [patent_no_of_words] => 24034 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18523174 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/523174
Group III-nitride high-electron mobility transistors with buried p-type layers and process for making the same Nov 28, 2023 Issued
Array ( [id] => 19054915 [patent_doc_number] => 20240096884 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-21 [patent_title] => METHOD OF MAKING POLYSILICON STRUCTURE INCLUDING PROTECTIVE LAYER [patent_app_type] => utility [patent_app_number] => 18/521404 [patent_app_country] => US [patent_app_date] => 2023-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4082 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18521404 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/521404
Method of making polysilicon structure including protective layer Nov 27, 2023 Issued
Array ( [id] => 19038091 [patent_doc_number] => 20240087906 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-14 [patent_title] => ANTI-OXIDATION LAYER TO PREVENT DIELECTRIC LOSS FROM PLANARIZATION PROCESS [patent_app_type] => utility [patent_app_number] => 18/514010 [patent_app_country] => US [patent_app_date] => 2023-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8461 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18514010 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/514010
Anti-oxidation layer to prevent dielectric loss from planarization process Nov 19, 2023 Issued
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