Search

Brian K. Young

Examiner (ID: 3088, Phone: (571)272-1816 , Office: P/2845 )

Most Active Art Unit
2819
Art Unit(s)
2819, 2107, 2845, 2104
Total Applications
2839
Issued Applications
2669
Pending Applications
75
Abandoned Applications
102

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 15940913 [patent_doc_number] => 20200162090 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-21 [patent_title] => TECHNIQUES TO IMPROVE LINEARITY OF R-2R LADDER DIGITAL-TO-ANALOG CONVERTERS (DACs) [patent_app_type] => utility [patent_app_number] => 16/197132 [patent_app_country] => US [patent_app_date] => 2018-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4327 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16197132 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/197132
Techniques to improve linearity of R-2R ladder digital-to-analog converters (DACs) Nov 19, 2018 Issued
Array ( [id] => 14415273 [patent_doc_number] => 20190173480 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-06 [patent_title] => ELECTRONIC CIRCUIT ADJUSTING SKEW BETWEEN PLURALITY OF CLOCKS BASED ON DERIVATIVE OF INPUT SIGNAL [patent_app_type] => utility [patent_app_number] => 16/194878 [patent_app_country] => US [patent_app_date] => 2018-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12650 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16194878 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/194878
ELECTRONIC CIRCUIT ADJUSTING SKEW BETWEEN PLURALITY OF CLOCKS BASED ON DERIVATIVE OF INPUT SIGNAL Nov 18, 2018 Abandoned
Array ( [id] => 15110351 [patent_doc_number] => 10476513 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-11-12 [patent_title] => SAR ADC with high linearity [patent_app_type] => utility [patent_app_number] => 16/195629 [patent_app_country] => US [patent_app_date] => 2018-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 16 [patent_no_of_words] => 2768 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16195629 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/195629
SAR ADC with high linearity Nov 18, 2018 Issued
Array ( [id] => 14632751 [patent_doc_number] => 20190229748 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-25 [patent_title] => CIRCUIT AND METHOD FOR DIGITAL-TO-ANALOG CONVERSION USING THREE-LEVEL CELLS [patent_app_type] => utility [patent_app_number] => 16/191584 [patent_app_country] => US [patent_app_date] => 2018-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7557 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16191584 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/191584
Circuit and method for digital-to-analog conversion using three-level cells Nov 14, 2018 Issued
Array ( [id] => 14051077 [patent_doc_number] => 20190081646 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-14 [patent_title] => DEVICES AND METHODS IMPLEMENTING POLAR CODES [patent_app_type] => utility [patent_app_number] => 16/188717 [patent_app_country] => US [patent_app_date] => 2018-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7569 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16188717 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/188717
Devices and methods implementing polar codes Nov 12, 2018 Issued
Array ( [id] => 15402065 [patent_doc_number] => 10541698 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-01-21 [patent_title] => Switched capacitor multiplying digital-to-analog converter [patent_app_type] => utility [patent_app_number] => 16/184184 [patent_app_country] => US [patent_app_date] => 2018-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 12597 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16184184 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/184184
Switched capacitor multiplying digital-to-analog converter Nov 7, 2018 Issued
Array ( [id] => 14527335 [patent_doc_number] => 10340941 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-07-02 [patent_title] => Trim digital-to-analog converter (DAC) for an R2R ladder DAC [patent_app_type] => utility [patent_app_number] => 16/183522 [patent_app_country] => US [patent_app_date] => 2018-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2845 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16183522 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/183522
Trim digital-to-analog converter (DAC) for an R2R ladder DAC Nov 6, 2018 Issued
Array ( [id] => 17047204 [patent_doc_number] => 11100389 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-24 [patent_title] => Conversion of digital signals into spiking analog signals [patent_app_type] => utility [patent_app_number] => 16/180999 [patent_app_country] => US [patent_app_date] => 2018-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2921 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16180999 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/180999
Conversion of digital signals into spiking analog signals Nov 4, 2018 Issued
Array ( [id] => 17047204 [patent_doc_number] => 11100389 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-24 [patent_title] => Conversion of digital signals into spiking analog signals [patent_app_type] => utility [patent_app_number] => 16/180999 [patent_app_country] => US [patent_app_date] => 2018-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2921 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16180999 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/180999
Conversion of digital signals into spiking analog signals Nov 4, 2018 Issued
Array ( [id] => 15548917 [patent_doc_number] => 10574254 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-25 [patent_title] => Hybrid flash architecture of successive approximation register analog to digital converter [patent_app_type] => utility [patent_app_number] => 16/173398 [patent_app_country] => US [patent_app_date] => 2018-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4235 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16173398 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/173398
Hybrid flash architecture of successive approximation register analog to digital converter Oct 28, 2018 Issued
Array ( [id] => 15582085 [patent_doc_number] => 10581443 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-03 [patent_title] => Method and apparatus for offset correction in SAR ADC with reduced capacitor array DAC [patent_app_type] => utility [patent_app_number] => 16/173289 [patent_app_country] => US [patent_app_date] => 2018-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4310 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16173289 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/173289
Method and apparatus for offset correction in SAR ADC with reduced capacitor array DAC Oct 28, 2018 Issued
Array ( [id] => 17078625 [patent_doc_number] => 11115045 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-07 [patent_title] => Adaptive analog-to-digital converter for pulsed signals based on multi-bit sigma-delta modulation [patent_app_type] => utility [patent_app_number] => 16/759531 [patent_app_country] => US [patent_app_date] => 2018-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 3534 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16759531 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/759531
Adaptive analog-to-digital converter for pulsed signals based on multi-bit sigma-delta modulation Oct 24, 2018 Issued
Array ( [id] => 14302227 [patent_doc_number] => 10291251 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-05-14 [patent_title] => Imaging systems with sub-radix-2 charge sharing successive approximation register (SAR) analog-to-digital converters [patent_app_type] => utility [patent_app_number] => 16/137876 [patent_app_country] => US [patent_app_date] => 2018-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 4584 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16137876 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/137876
Imaging systems with sub-radix-2 charge sharing successive approximation register (SAR) analog-to-digital converters Sep 20, 2018 Issued
Array ( [id] => 14111867 [patent_doc_number] => 20190097609 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-28 [patent_title] => Five-Level Switched-Capacitance DAC Using Bootstrapped Switches [patent_app_type] => utility [patent_app_number] => 16/138156 [patent_app_country] => US [patent_app_date] => 2018-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4326 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 34 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16138156 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/138156
Five-level switched-capacitance DAC using bootstrapped switches Sep 20, 2018 Issued
Array ( [id] => 14334451 [patent_doc_number] => 10298258 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-05-21 [patent_title] => Data compression method based on sampling and estimation [patent_app_type] => utility [patent_app_number] => 16/136771 [patent_app_country] => US [patent_app_date] => 2018-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3456 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16136771 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/136771
Data compression method based on sampling and estimation Sep 19, 2018 Issued
Array ( [id] => 14109651 [patent_doc_number] => 20190096501 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-28 [patent_title] => Low Distortion Sample and Hold (S/H) Circuits and Associated Methods for Use with Analog-to-Digital Converters (ADCs) [patent_app_type] => utility [patent_app_number] => 16/135053 [patent_app_country] => US [patent_app_date] => 2018-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7887 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16135053 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/135053
Low distortion sample and hold (S/H) circuits and associated methods for use with analog-to-digital converters (ADCs) Sep 18, 2018 Issued
Array ( [id] => 14352277 [patent_doc_number] => 20190158111 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-23 [patent_title] => INTERLEAVING QUANTIZER IN CONTINUOUS-TIME DELTA-SIGMA MODULATOR FOR QUANTIZATION LEVEL INCREMENT [patent_app_type] => utility [patent_app_number] => 16/134960 [patent_app_country] => US [patent_app_date] => 2018-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4071 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16134960 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/134960
Interleaving quantizer in continuous-time delta-sigma modulator for quantization level increment Sep 17, 2018 Issued
Array ( [id] => 14544009 [patent_doc_number] => 20190207626 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-04 [patent_title] => DECOMPRESSION OF MODEL PARAMETERS USING FUNCTIONS BASED UPON CUMULATIVE COUNT DISTRIBUTIONS [patent_app_type] => utility [patent_app_number] => 16/132201 [patent_app_country] => US [patent_app_date] => 2018-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6709 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16132201 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/132201
Decompression of model parameters using functions based upon cumulative count distributions Sep 13, 2018 Issued
Array ( [id] => 15235085 [patent_doc_number] => 10505274 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-10 [patent_title] => Modal antenna array for interference mitigation [patent_app_type] => utility [patent_app_number] => 16/125069 [patent_app_country] => US [patent_app_date] => 2018-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 2925 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16125069 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/125069
Modal antenna array for interference mitigation Sep 6, 2018 Issued
Array ( [id] => 14037243 [patent_doc_number] => 10230385 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-03-12 [patent_title] => Analog/digital conversion device and control method therefor [patent_app_type] => utility [patent_app_number] => 16/104817 [patent_app_country] => US [patent_app_date] => 2018-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 6985 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16104817 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/104817
Analog/digital conversion device and control method therefor Aug 16, 2018 Issued
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