
Brian Keith Dutton
Examiner (ID: 16060)
| Most Active Art Unit | 1107 |
| Art Unit(s) | 1107, 2823, 2812, 2822 |
| Total Applications | 584 |
| Issued Applications | 544 |
| Pending Applications | 10 |
| Abandoned Applications | 30 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4009128
[patent_doc_number] => 05920767
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-07-06
[patent_title] => 'Method of forming a groove in a semiconductor laser diode and a semiconductor laser diode'
[patent_app_type] => 1
[patent_app_number] => 8/681017
[patent_app_country] => US
[patent_app_date] => 1996-07-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 12
[patent_no_of_words] => 9075
[patent_no_of_claims] => 2
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[patent_words_short_claim] => 171
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/920/05920767.pdf
[firstpage_image] =>[orig_patent_app_number] => 681017
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/681017 | Method of forming a groove in a semiconductor laser diode and a semiconductor laser diode | Jul 21, 1996 | Issued |
Array
(
[id] => 3824067
[patent_doc_number] => 05759753
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-06-02
[patent_title] => 'Piezoelectric device and method of manufacturing the same'
[patent_app_type] => 1
[patent_app_number] => 8/677548
[patent_app_country] => US
[patent_app_date] => 1996-07-18
[patent_effective_date] => 0000-00-00
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[patent_no_of_words] => 7517
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[patent_maintenance] => 1
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[pdf_file] => patents/05/759/05759753.pdf
[firstpage_image] =>[orig_patent_app_number] => 677548
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/677548 | Piezoelectric device and method of manufacturing the same | Jul 17, 1996 | Issued |
Array
(
[id] => 3894450
[patent_doc_number] => 05750420
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-05-12
[patent_title] => 'Method for manufacturing a structure with a useful layer held at a distance from a substrate by abutments, and for detaching such a layer'
[patent_app_type] => 1
[patent_app_number] => 8/676629
[patent_app_country] => US
[patent_app_date] => 1996-07-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_no_of_words] => 3637
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/750/05750420.pdf
[firstpage_image] =>[orig_patent_app_number] => 676629
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/676629 | Method for manufacturing a structure with a useful layer held at a distance from a substrate by abutments, and for detaching such a layer | Jul 9, 1996 | Issued |
Array
(
[id] => 3870177
[patent_doc_number] => 05763322
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-06-09
[patent_title] => 'Method of annealing film stacks and device having stack produced by same'
[patent_app_type] => 1
[patent_app_number] => 8/676593
[patent_app_country] => US
[patent_app_date] => 1996-07-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 5424
[patent_no_of_claims] => 30
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[pdf_file] => patents/05/763/05763322.pdf
[firstpage_image] =>[orig_patent_app_number] => 676593
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/676593 | Method of annealing film stacks and device having stack produced by same | Jul 7, 1996 | Issued |
| 08/675149 | PROCESS FOR PRODUCING SEMICONDUCTOR INTEGRATED CIRCUIT | Jul 2, 1996 | Abandoned |
Array
(
[id] => 3687012
[patent_doc_number] => 05696035
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-12-09
[patent_title] => 'Etchant, etching method, and method of fabricating semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 8/675305
[patent_app_country] => US
[patent_app_date] => 1996-07-01
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[pdf_file] => patents/05/696/05696035.pdf
[firstpage_image] =>[orig_patent_app_number] => 675305
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/675305 | Etchant, etching method, and method of fabricating semiconductor device | Jun 30, 1996 | Issued |
Array
(
[id] => 3884222
[patent_doc_number] => 05776793
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-07-07
[patent_title] => 'Method of fabricating opto-electronic device'
[patent_app_type] => 1
[patent_app_number] => 8/672107
[patent_app_country] => US
[patent_app_date] => 1996-06-27
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[pdf_file] => patents/05/776/05776793.pdf
[firstpage_image] =>[orig_patent_app_number] => 672107
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/672107 | Method of fabricating opto-electronic device | Jun 26, 1996 | Issued |
Array
(
[id] => 3726757
[patent_doc_number] => 05702965
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-12-30
[patent_title] => 'Flash memory cell and method of making the same'
[patent_app_type] => 1
[patent_app_number] => 8/666013
[patent_app_country] => US
[patent_app_date] => 1996-06-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_no_of_words] => 1733
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[pdf_file] => patents/05/702/05702965.pdf
[firstpage_image] =>[orig_patent_app_number] => 666013
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/666013 | Flash memory cell and method of making the same | Jun 18, 1996 | Issued |
Array
(
[id] => 3925755
[patent_doc_number] => 05877039
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-03-02
[patent_title] => 'Method of making a semiconductor pressure sensor'
[patent_app_type] => 1
[patent_app_number] => 8/668005
[patent_app_country] => US
[patent_app_date] => 1996-06-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 32
[patent_no_of_words] => 6360
[patent_no_of_claims] => 13
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[pdf_file] => patents/05/877/05877039.pdf
[firstpage_image] =>[orig_patent_app_number] => 668005
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/668005 | Method of making a semiconductor pressure sensor | Jun 18, 1996 | Issued |
Array
(
[id] => 4006577
[patent_doc_number] => 05888857
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-03-30
[patent_title] => 'Semiconductor device and method for manufacturing the same'
[patent_app_type] => 1
[patent_app_number] => 8/661013
[patent_app_country] => US
[patent_app_date] => 1996-06-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
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[pdf_file] => patents/05/888/05888857.pdf
[firstpage_image] =>[orig_patent_app_number] => 661013
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/661013 | Semiconductor device and method for manufacturing the same | Jun 9, 1996 | Issued |
Array
(
[id] => 3807720
[patent_doc_number] => 05811314
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-09-22
[patent_title] => 'Magnetic ink and method for manufacturing and sifting out of defective dice by using the same'
[patent_app_type] => 1
[patent_app_number] => 8/660135
[patent_app_country] => US
[patent_app_date] => 1996-06-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_no_of_words] => 1410
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[pdf_file] => patents/05/811/05811314.pdf
[firstpage_image] =>[orig_patent_app_number] => 660135
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/660135 | Magnetic ink and method for manufacturing and sifting out of defective dice by using the same | Jun 6, 1996 | Issued |
Array
(
[id] => 3768628
[patent_doc_number] => 05733798
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-03-31
[patent_title] => 'Mask generation technique for producing an integrated circuit with optimal polysilicon interconnect layout for achieving global planarization'
[patent_app_type] => 1
[patent_app_number] => 8/655247
[patent_app_country] => US
[patent_app_date] => 1996-06-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[pdf_file] => patents/05/733/05733798.pdf
[firstpage_image] =>[orig_patent_app_number] => 655247
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/655247 | Mask generation technique for producing an integrated circuit with optimal polysilicon interconnect layout for achieving global planarization | Jun 4, 1996 | Issued |
Array
(
[id] => 3825741
[patent_doc_number] => 05783481
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-07-21
[patent_title] => 'Semiconductor interlevel dielectric having a polymide for producing air gaps'
[patent_app_type] => 1
[patent_app_number] => 8/659167
[patent_app_country] => US
[patent_app_date] => 1996-06-05
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[patent_drawing_sheets_cnt] => 2
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[pdf_file] => patents/05/783/05783481.pdf
[firstpage_image] =>[orig_patent_app_number] => 659167
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/659167 | Semiconductor interlevel dielectric having a polymide for producing air gaps | Jun 4, 1996 | Issued |
Array
(
[id] => 3807932
[patent_doc_number] => 05811329
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-09-22
[patent_title] => 'Method of forming CMOS circuitry including patterning a layer of conductive material overlying field isolation oxide'
[patent_app_type] => 1
[patent_app_number] => 8/655683
[patent_app_country] => US
[patent_app_date] => 1996-06-03
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[firstpage_image] =>[orig_patent_app_number] => 655683
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/655683 | Method of forming CMOS circuitry including patterning a layer of conductive material overlying field isolation oxide | Jun 2, 1996 | Issued |
Array
(
[id] => 3632738
[patent_doc_number] => 05610081
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-03-11
[patent_title] => 'Integrated circuit module fixing method for temperature cycling test'
[patent_app_type] => 1
[patent_app_number] => 8/658525
[patent_app_country] => US
[patent_app_date] => 1996-06-03
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[pdf_file] => patents/05/610/05610081.pdf
[firstpage_image] =>[orig_patent_app_number] => 658525
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/658525 | Integrated circuit module fixing method for temperature cycling test | Jun 2, 1996 | Issued |
Array
(
[id] => 3624887
[patent_doc_number] => 05620913
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-04-15
[patent_title] => 'Method of making a flash memory cell'
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[pdf_file] => patents/05/620/05620913.pdf
[firstpage_image] =>[orig_patent_app_number] => 654517
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/654517 | Method of making a flash memory cell | May 27, 1996 | Issued |
Array
(
[id] => 3826003
[patent_doc_number] => 05783498
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-07-21
[patent_title] => 'Method of forming silicon dioxide film containing germanium nanocrystals'
[patent_app_type] => 1
[patent_app_number] => 8/654121
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[patent_app_date] => 1996-05-28
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[pdf_file] => patents/05/783/05783498.pdf
[firstpage_image] =>[orig_patent_app_number] => 654121
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/654121 | Method of forming silicon dioxide film containing germanium nanocrystals | May 27, 1996 | Issued |
Array
(
[id] => 3760408
[patent_doc_number] => 05851904
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-12-22
[patent_title] => 'Method of manufacturing microcrystalline layers and their utilization'
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[patent_app_country] => US
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[firstpage_image] =>[orig_patent_app_number] => 624403
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/624403 | Method of manufacturing microcrystalline layers and their utilization | May 16, 1996 | Issued |
Array
(
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[firstpage_image] =>[orig_patent_app_number] => 649517
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/649517 | Thin film transistor-liquid crystal display and a manufacturing method thereof | May 16, 1996 | Issued |
Array
(
[id] => 3656115
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[pdf_file] => patents/05/622/05622886.pdf
[firstpage_image] =>[orig_patent_app_number] => 648306
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/648306 | Method of making a high voltage rectifier for an integrated circuit chip | May 12, 1996 | Issued |