Brian M. Epstein

Array ( [id] => 13878153 [patent_doc_number] => 20190035417 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-31 [patent_title] => SYSTEMS AND METHODS FOR INTRA-ORAL BASED COMMUNICATIONS [patent_app_type] => utility [patent_app_number] => 16/139946 [patent_app_country] => US [patent_app_date] => 2018-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6148 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 7 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16139946 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16372538 [patent_doc_number] => 10804304 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-13 [patent_title] => Image sensors [patent_app_type] => utility [patent_app_number] => 16/114453 [patent_app_country] => US [patent_app_date] => 2018-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 8463 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16114453 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16448393 [patent_doc_number] => 10840324 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-17 [patent_title] => Semiconductor structure and manufacturing method for the same [patent_app_type] => utility [patent_app_number] => 16/114885 [patent_app_country] => US [patent_app_date] => 2018-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 8969 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16114885 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16172887 [patent_doc_number] => 10714465 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-14 [patent_title] => Motor drive circuit, semiconductor apparatus, and electronic device [patent_app_type] => utility [patent_app_number] => 16/114913 [patent_app_country] => US [patent_app_date] => 2018-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 13534 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 258 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16114913 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15641229 [patent_doc_number] => 10593619 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-03-17 [patent_title] => Transistor shield structure, packaged device, and method of manufacture [patent_app_type] => utility [patent_app_number] => 16/114468 [patent_app_country] => US [patent_app_date] => 2018-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 12068 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16114468 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16308890 [patent_doc_number] => 10777701 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-15 [patent_title] => Photosensitive detector with self-aligned 3D junction and gate [patent_app_type] => utility [patent_app_number] => 16/114324 [patent_app_country] => US [patent_app_date] => 2018-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 27 [patent_no_of_words] => 6060 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16114324 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15597843 [patent_doc_number] => 20200075456 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-05 [patent_title] => HYBRID DUAL DAMASCENE STRUCTURES WITH ENLARGED CONTACTS [patent_app_type] => utility [patent_app_number] => 16/114600 [patent_app_country] => US [patent_app_date] => 2018-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3298 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16114600 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16293734 [patent_doc_number] => 10770590 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-08 [patent_title] => Semiconductor structures and fabrication methods thereof [patent_app_type] => utility [patent_app_number] => 16/114857 [patent_app_country] => US [patent_app_date] => 2018-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 11213 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16114857 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14024099 [patent_doc_number] => 20190074043 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-07 [patent_title] => SPIN CURRENT MAGNETIZATION REVERSING ELEMENT, MAGNETORESISTANCE EFFECT ELEMENT, MAGNETIC MEMORY, AND MAGNETIC DEVICE [patent_app_type] => utility [patent_app_number] => 16/114692 [patent_app_country] => US [patent_app_date] => 2018-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6389 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16114692 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15673311 [patent_doc_number] => 10600899 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-24 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 16/114806 [patent_app_country] => US [patent_app_date] => 2018-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4468 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16114806 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13996655 [patent_doc_number] => 20190067485 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-28 [patent_title] => SEMICONDUCTOR STRUCTURE AND FABRICATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/114749 [patent_app_country] => US [patent_app_date] => 2018-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5161 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16114749 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16048417 [patent_doc_number] => 10686094 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-16 [patent_title] => Photodetection element [patent_app_type] => utility [patent_app_number] => 16/114360 [patent_app_country] => US [patent_app_date] => 2018-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 29 [patent_no_of_words] => 11231 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16114360 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15598453 [patent_doc_number] => 20200075761 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-05 [patent_title] => CONTROLLING GATE LENGTH OF VERTICAL TRANSISTORS [patent_app_type] => utility [patent_app_number] => 16/114613 [patent_app_country] => US [patent_app_date] => 2018-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6416 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16114613 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14114143 [patent_doc_number] => 20190098747 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-28 [patent_title] => SEMICONDUCTOR DEVICES AND METHODS FOR ENHANCING SIGNAL INTEGRITY OF AN INTERFACE PROVIDED BY A SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/114669 [patent_app_country] => US [patent_app_date] => 2018-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5459 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16114669 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15921969 [patent_doc_number] => 10658232 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-19 [patent_title] => Interconnect structure [patent_app_type] => utility [patent_app_number] => 16/109679 [patent_app_country] => US [patent_app_date] => 2018-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 18 [patent_no_of_words] => 6606 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16109679 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13613675 [patent_doc_number] => 20180358387 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-13 [patent_title] => THIN FILM TRANSISTOR, DISPLAY DEVICE, ELECTRONIC APPARATUS AND METHOD OF MANUFACTURING THIN FILM TRANSISTOR [patent_app_type] => utility [patent_app_number] => 16/006759 [patent_app_country] => US [patent_app_date] => 2018-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21326 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16006759 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13363843 [patent_doc_number] => 20180233461 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-16 [patent_title] => SEMICONDUCTOR DEVICE AND AUTHENTICATION SYSTEM [patent_app_type] => utility [patent_app_number] => 15/953564 [patent_app_country] => US [patent_app_date] => 2018-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8725 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15953564 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15054517 [patent_doc_number] => 10457546 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-29 [patent_title] => Micro-electro-mechanical system structure and method for forming the same [patent_app_type] => utility [patent_app_number] => 15/921203 [patent_app_country] => US [patent_app_date] => 2018-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 2282 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15921203 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14079701 [patent_doc_number] => 20190088738 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-21 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 15/901930 [patent_app_country] => US [patent_app_date] => 2018-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8455 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15901930 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14221581 [patent_doc_number] => 20190123175 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-25 [patent_title] => FINFET STRUCTURE AND METHOD FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 15/901992 [patent_app_country] => US [patent_app_date] => 2018-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5743 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15901992 [rel_patent_id] =>[rel_patent_doc_number] =>)