Search

Brian O Peters

Examiner (ID: 1902, Phone: (571)272-2662 , Office: P/3745 )

Most Active Art Unit
3745
Art Unit(s)
3745
Total Applications
747
Issued Applications
536
Pending Applications
47
Abandoned Applications
164

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18048003 [patent_doc_number] => 11521961 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-06 [patent_title] => Back ballasted vertical NPN transistor [patent_app_type] => utility [patent_app_number] => 16/914579 [patent_app_country] => US [patent_app_date] => 2020-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 22 [patent_no_of_words] => 4841 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16914579 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/914579
Back ballasted vertical NPN transistor Jun 28, 2020 Issued
Array ( [id] => 16364585 [patent_doc_number] => 20200321336 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-08 [patent_title] => MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/910297 [patent_app_country] => US [patent_app_date] => 2020-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10803 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16910297 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/910297
Manufacturing method of semiconductor device Jun 23, 2020 Issued
Array ( [id] => 17574344 [patent_doc_number] => 11322619 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-03 [patent_title] => Semiconductor device structure and method for forming the same [patent_app_type] => utility [patent_app_number] => 16/905450 [patent_app_country] => US [patent_app_date] => 2020-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 53 [patent_no_of_words] => 8857 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16905450 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/905450
Semiconductor device structure and method for forming the same Jun 17, 2020 Issued
Array ( [id] => 17078199 [patent_doc_number] => 11114615 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-07 [patent_title] => Chalcogenide memory device components and composition [patent_app_type] => utility [patent_app_number] => 16/905366 [patent_app_country] => US [patent_app_date] => 2020-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 12429 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16905366 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/905366
Chalcogenide memory device components and composition Jun 17, 2020 Issued
Array ( [id] => 17295627 [patent_doc_number] => 20210391466 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-16 [patent_title] => SEMICONDUCTOR DEVICE STRUCTURE AND METHOD FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 16/899832 [patent_app_country] => US [patent_app_date] => 2020-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11903 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16899832 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/899832
Semiconductor device structure and method for forming the same Jun 11, 2020 Issued
Array ( [id] => 16796166 [patent_doc_number] => 20210125983 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-29 [patent_title] => INTEGRATED CIRCUIT DEVICES AND METHODS OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/946060 [patent_app_country] => US [patent_app_date] => 2020-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16040 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16946060 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/946060
Integrated circuit devices and methods of manufacturing the same Jun 3, 2020 Issued
Array ( [id] => 16803466 [patent_doc_number] => 10998423 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-04 [patent_title] => Fabrication of multi-channel nanowire devices with self-aligned internal spacers and SOI FinFETs using selective silicon nitride capping [patent_app_type] => utility [patent_app_number] => 16/881549 [patent_app_country] => US [patent_app_date] => 2020-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 10230 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16881549 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/881549
Fabrication of multi-channel nanowire devices with self-aligned internal spacers and SOI FinFETs using selective silicon nitride capping May 21, 2020 Issued
Array ( [id] => 16773975 [patent_doc_number] => 10985096 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-20 [patent_title] => Electrical device terminal finishing [patent_app_type] => utility [patent_app_number] => 16/878576 [patent_app_country] => US [patent_app_date] => 2020-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 5216 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16878576 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/878576
Electrical device terminal finishing May 18, 2020 Issued
Array ( [id] => 17758181 [patent_doc_number] => 11398480 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-26 [patent_title] => Transistor having forked nanosheets with wraparound contacts [patent_app_type] => utility [patent_app_number] => 16/874733 [patent_app_country] => US [patent_app_date] => 2020-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 10705 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16874733 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/874733
Transistor having forked nanosheets with wraparound contacts May 14, 2020 Issued
Array ( [id] => 16272571 [patent_doc_number] => 20200274059 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-27 [patent_title] => DEVICES INCLUDING MULTI-PORTION LINERS [patent_app_type] => utility [patent_app_number] => 16/870108 [patent_app_country] => US [patent_app_date] => 2020-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6152 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16870108 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/870108
Devices including multi-portion liners May 7, 2020 Issued
Array ( [id] => 16928526 [patent_doc_number] => 11050020 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-29 [patent_title] => Methods of forming devices including multi-portion liners [patent_app_type] => utility [patent_app_number] => 16/870137 [patent_app_country] => US [patent_app_date] => 2020-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 6184 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16870137 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/870137
Methods of forming devices including multi-portion liners May 7, 2020 Issued
Array ( [id] => 17878652 [patent_doc_number] => 11450676 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-20 [patent_title] => Ferroelectric random access memory device with a three-dimensional ferroelectric capacitor [patent_app_type] => utility [patent_app_number] => 16/868922 [patent_app_country] => US [patent_app_date] => 2020-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 9726 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16868922 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/868922
Ferroelectric random access memory device with a three-dimensional ferroelectric capacitor May 6, 2020 Issued
Array ( [id] => 16487928 [patent_doc_number] => 20200381537 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-03 [patent_title] => Optimized Proximity Profile for Strained Source/Drain Feature and Method of Fabricating Thereof [patent_app_type] => utility [patent_app_number] => 16/867949 [patent_app_country] => US [patent_app_date] => 2020-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17545 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16867949 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/867949
Optimized proximity profile for strained source/drain feature and method of fabricating thereof May 5, 2020 Issued
Array ( [id] => 16674856 [patent_doc_number] => 20210063620 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-04 [patent_title] => DISPLAY DEVICE AND ELECTRONIC APPARATUS [patent_app_type] => utility [patent_app_number] => 16/854309 [patent_app_country] => US [patent_app_date] => 2020-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17908 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16854309 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/854309
Display device and electronic apparatus Apr 20, 2020 Issued
Array ( [id] => 17210830 [patent_doc_number] => 11171208 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-09 [patent_title] => High performance circuit applications using stacked 3D metal lines [patent_app_type] => utility [patent_app_number] => 16/848738 [patent_app_country] => US [patent_app_date] => 2020-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 2388 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16848738 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/848738
High performance circuit applications using stacked 3D metal lines Apr 13, 2020 Issued
Array ( [id] => 17544289 [patent_doc_number] => 11309424 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-19 [patent_title] => Semiconductor device and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 16/847204 [patent_app_country] => US [patent_app_date] => 2020-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 55 [patent_figures_cnt] => 55 [patent_no_of_words] => 9857 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16847204 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/847204
Semiconductor device and manufacturing method thereof Apr 12, 2020 Issued
Array ( [id] => 17395999 [patent_doc_number] => 11245024 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-08 [patent_title] => Semiconductor device and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 16/844809 [patent_app_country] => US [patent_app_date] => 2020-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 53 [patent_figures_cnt] => 61 [patent_no_of_words] => 11038 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16844809 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/844809
Semiconductor device and manufacturing method thereof Apr 8, 2020 Issued
Array ( [id] => 16379374 [patent_doc_number] => 20200328217 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-15 [patent_title] => SEMICONDUCTOR DEVICE AND METHODS OF FORMING AND OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 16/844044 [patent_app_country] => US [patent_app_date] => 2020-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5402 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16844044 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/844044
Semiconductor device and methods of forming and operating the same Apr 8, 2020 Issued
Array ( [id] => 17145313 [patent_doc_number] => 20210313326 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-07 [patent_title] => TRANSISTORS IN A LAYERED ARRANGEMENT [patent_app_type] => utility [patent_app_number] => 16/840964 [patent_app_country] => US [patent_app_date] => 2020-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7986 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16840964 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/840964
TRANSISTORS IN A LAYERED ARRANGEMENT Apr 5, 2020 Abandoned
Array ( [id] => 16194154 [patent_doc_number] => 20200235003 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-23 [patent_title] => SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 16/838648 [patent_app_country] => US [patent_app_date] => 2020-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6976 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16838648 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/838648
SEMICONDUCTOR DEVICES Apr 1, 2020 Abandoned
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