Search

Brian O Peters

Examiner (ID: 1902, Phone: (571)272-2662 , Office: P/3745 )

Most Active Art Unit
3745
Art Unit(s)
3745
Total Applications
747
Issued Applications
536
Pending Applications
47
Abandoned Applications
164

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17130627 [patent_doc_number] => 20210305396 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-30 [patent_title] => MOSFET DEVICE STRUCTURE WITH AIR-GAPS IN SPACER AND METHODS FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 16/835556 [patent_app_country] => US [patent_app_date] => 2020-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8749 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16835556 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/835556
MOSFET device structure with air-gaps in spacer and methods for forming the same Mar 30, 2020 Issued
Array ( [id] => 16180295 [patent_doc_number] => 20200227264 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-16 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 16/831827 [patent_app_country] => US [patent_app_date] => 2020-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3125 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16831827 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/831827
Semiconductor device and method for fabricating the same Mar 26, 2020 Issued
Array ( [id] => 17270497 [patent_doc_number] => 11195928 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-07 [patent_title] => Semiconductor devices including a gate isolation structure and a gate capping layer including different materials from each other [patent_app_type] => utility [patent_app_number] => 16/822275 [patent_app_country] => US [patent_app_date] => 2020-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 9960 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16822275 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/822275
Semiconductor devices including a gate isolation structure and a gate capping layer including different materials from each other Mar 17, 2020 Issued
Array ( [id] => 16973751 [patent_doc_number] => 11069733 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-20 [patent_title] => Image sensor having improved full well capacity and related method of formation [patent_app_type] => utility [patent_app_number] => 16/815371 [patent_app_country] => US [patent_app_date] => 2020-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 10007 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16815371 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/815371
Image sensor having improved full well capacity and related method of formation Mar 10, 2020 Issued
Array ( [id] => 17078111 [patent_doc_number] => 11114527 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-07 [patent_title] => Semiconductor device and method for manufacturing same [patent_app_type] => utility [patent_app_number] => 16/815636 [patent_app_country] => US [patent_app_date] => 2020-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 50 [patent_figures_cnt] => 62 [patent_no_of_words] => 22735 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 308 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16815636 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/815636
Semiconductor device and method for manufacturing same Mar 10, 2020 Issued
Array ( [id] => 16746531 [patent_doc_number] => 10971534 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-06 [patent_title] => Image sensor having improved full well capacity and related method of formation [patent_app_type] => utility [patent_app_number] => 16/815409 [patent_app_country] => US [patent_app_date] => 2020-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 10007 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16815409 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/815409
Image sensor having improved full well capacity and related method of formation Mar 10, 2020 Issued
Array ( [id] => 17002735 [patent_doc_number] => 11081558 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-03 [patent_title] => LDMOS with high-k drain STI dielectric [patent_app_type] => utility [patent_app_number] => 16/812311 [patent_app_country] => US [patent_app_date] => 2020-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 3907 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16812311 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/812311
LDMOS with high-k drain STI dielectric Mar 7, 2020 Issued
Array ( [id] => 17085418 [patent_doc_number] => 20210280425 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-09 [patent_title] => SEMICONDUCTOR DEVICE STRUCTURE WITH FINE PATTERNS AND METHOD FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 16/810328 [patent_app_country] => US [patent_app_date] => 2020-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10899 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16810328 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/810328
Semiconductor device structure with fine patterns and method for forming the same Mar 4, 2020 Issued
Array ( [id] => 17085676 [patent_doc_number] => 20210280683 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-09 [patent_title] => GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING DUAL NANORIBBON CHANNEL STRUCTURES [patent_app_type] => utility [patent_app_number] => 16/810156 [patent_app_country] => US [patent_app_date] => 2020-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16707 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16810156 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/810156
Gate-all-around integrated circuit structures having dual nanoribbon channel structures Mar 4, 2020 Issued
Array ( [id] => 16098711 [patent_doc_number] => 20200203342 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-25 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/809046 [patent_app_country] => US [patent_app_date] => 2020-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10855 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16809046 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/809046
Semiconductor device and manufacturing method thereof Mar 3, 2020 Issued
Array ( [id] => 17366116 [patent_doc_number] => 11233149 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-01-25 [patent_title] => Spacer structures for semiconductor devices [patent_app_type] => utility [patent_app_number] => 16/807303 [patent_app_country] => US [patent_app_date] => 2020-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 64 [patent_no_of_words] => 12777 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16807303 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/807303
Spacer structures for semiconductor devices Mar 2, 2020 Issued
Array ( [id] => 17085479 [patent_doc_number] => 20210280486 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-09 [patent_title] => PASSIVATION LAYERS FOR SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 16/807305 [patent_app_country] => US [patent_app_date] => 2020-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10436 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16807305 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/807305
Passivation layers for semiconductor devices Mar 2, 2020 Issued
Array ( [id] => 17574135 [patent_doc_number] => 11322409 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-03 [patent_title] => Multi-gate devices and method of fabricating the same [patent_app_type] => utility [patent_app_number] => 16/805832 [patent_app_country] => US [patent_app_date] => 2020-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 39 [patent_no_of_words] => 9161 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16805832 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/805832
Multi-gate devices and method of fabricating the same Mar 1, 2020 Issued
Array ( [id] => 17310345 [patent_doc_number] => 11211472 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-28 [patent_title] => Semiconductor device and method of forming the same [patent_app_type] => utility [patent_app_number] => 16/799650 [patent_app_country] => US [patent_app_date] => 2020-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 6694 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16799650 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/799650
Semiconductor device and method of forming the same Feb 23, 2020 Issued
Array ( [id] => 16739424 [patent_doc_number] => 10965097 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-30 [patent_title] => Light emitting device [patent_app_type] => utility [patent_app_number] => 16/794476 [patent_app_country] => US [patent_app_date] => 2020-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 5832 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16794476 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/794476
Light emitting device Feb 18, 2020 Issued
Array ( [id] => 16586234 [patent_doc_number] => 20210020636 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-21 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 16/789588 [patent_app_country] => US [patent_app_date] => 2020-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10857 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16789588 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/789588
Semiconductor device and method for fabricating the same Feb 12, 2020 Issued
Array ( [id] => 17224873 [patent_doc_number] => 11177383 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-16 [patent_title] => Semiconductor device structure and method for forming the same [patent_app_type] => utility [patent_app_number] => 16/785985 [patent_app_country] => US [patent_app_date] => 2020-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 38 [patent_figures_cnt] => 59 [patent_no_of_words] => 9769 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16785985 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/785985
Semiconductor device structure and method for forming the same Feb 9, 2020 Issued
Array ( [id] => 17025634 [patent_doc_number] => 20210249506 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-12 [patent_title] => NANOSHEET TRANSISTOR HAVING PARTIALLY SELF-LIMITING BOTTOM ISOLATION EXTENDING INTO THE SUBSTRATE AND UNDER THE SOURCE/DRAIN AND GATE REGIONS [patent_app_type] => utility [patent_app_number] => 16/785899 [patent_app_country] => US [patent_app_date] => 2020-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7484 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16785899 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/785899
Nanosheet transistor having partially self-limiting bottom isolation extending into the substrate and under the source/drain and gate regions Feb 9, 2020 Issued
Array ( [id] => 17224875 [patent_doc_number] => 11177385 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-16 [patent_title] => Transistors with a hybrid source or drain [patent_app_type] => utility [patent_app_number] => 16/781236 [patent_app_country] => US [patent_app_date] => 2020-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 4540 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 262 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16781236 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/781236
Transistors with a hybrid source or drain Feb 3, 2020 Issued
Array ( [id] => 16456264 [patent_doc_number] => 20200365690 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-19 [patent_title] => SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 16/775513 [patent_app_country] => US [patent_app_date] => 2020-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13317 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16775513 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/775513
Semiconductor devices Jan 28, 2020 Issued
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