Brian O Peters
Examiner (ID: 1902, Phone: (571)272-2662 , Office: P/3745 )
Most Active Art Unit | 3745 |
Art Unit(s) | 3745 |
Total Applications | 747 |
Issued Applications | 536 |
Pending Applications | 47 |
Abandoned Applications | 164 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
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[id] => 11718160
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[patent_title] => 'SEMICONDUCTOR DEVICES HAVING THROUGH ELECTRODES AND METHODS OF MANUFACTURING THE SAME'
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Array
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[patent_title] => Display device and electronic apparatus
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[patent_issue_date] => 2019-02-26
[patent_title] => Method of producing nitride fluorescent material, nitride fluorescent material, and light emitting device using the same
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[patent_title] => Fluorescent material, light emitting device, and method for producing fluorescent material
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/440647 | Semiconductor device including stacked structure | Feb 22, 2017 | Issued |
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[patent_title] => 'DISPLAY DEVICE AND METHOD OF MANUFACTURING A DISPLAY DEVICE'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/440478 | Display device and method of manufacturing a display device | Feb 22, 2017 | Issued |
Array
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[id] => 16781965
[patent_doc_number] => 20210119044
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[patent_issue_date] => 2021-04-22
[patent_title] => DRAIN EXTENDED TUNNEL FIELD EFFECT TRANSISTOR
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/439951 | Drain extended tunnel field effect transistor | Feb 22, 2017 | Issued |
Array
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[patent_title] => MICROSTRUCTURE MODULATION FOR METAL WAFER-WAFER BONDING
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/440807 | Microstructure modulation for metal wafer-wafer bonding | Feb 22, 2017 | Issued |
Array
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[patent_title] => SEMICONDUCTOR DEVICE, INVERTER CIRCUIT, DRIVING DEVICE, VEHICLE, AND ELEVATOR
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/440389 | SEMICONDUCTOR DEVICE, INVERTER CIRCUIT, DRIVING DEVICE, VEHICLE, AND ELEVATOR | Feb 22, 2017 | Abandoned |
Array
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Array
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[patent_title] => SEMICONDUCTOR DEVICE WITH SIX-SIDED PROTECTED WALLS
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/440522 | Semiconductor device with six-sided protected walls | Feb 22, 2017 | Issued |
Array
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[id] => 13349439
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[patent_title] => Shaped Etch Profile with Oxidation
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/424181 | Shaped etch profile with oxidation | Feb 2, 2017 | Issued |
Array
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[id] => 13188435
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[patent_title] => Graphene transistor and ternary logic device using the same
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Array
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[patent_title] => Structure featuring ferroelectric capacitance in interconnect level for steep sub-threshold complementary metal oxide semiconductor transistors
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/424379 | Vertical transport field effect transistors | Feb 2, 2017 | Issued |
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