Brian O Peters
Examiner (ID: 1902, Phone: (571)272-2662 , Office: P/3745 )
Most Active Art Unit | 3745 |
Art Unit(s) | 3745 |
Total Applications | 747 |
Issued Applications | 536 |
Pending Applications | 47 |
Abandoned Applications | 164 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 11869712
[patent_doc_number] => 20170236998
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-08-17
[patent_title] => 'INTEGRATED ANISOTROPIC MAGNETORESISTIVE DEVICE'
[patent_app_type] => utility
[patent_app_number] => 15/041575
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/041575 | Integrated anisotropic magnetoresistive device | Feb 10, 2016 | Issued |
Array
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[patent_issue_date] => 2016-12-22
[patent_title] => 'Semiconductor Device and Radio Frequency Module Formed on High Resistivity Substrate'
[patent_app_type] => utility
[patent_app_number] => 15/041535
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/041535 | Semiconductor device and radio frequency module formed on high resistivity substrate | Feb 10, 2016 | Issued |
Array
(
[id] => 11623161
[patent_doc_number] => 20170133349
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-05-11
[patent_title] => 'METHOD OF PACKAGING INTEGRATED CIRCUIT DIE AND DEVICE'
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[patent_app_number] => 15/041026
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[patent_app_date] => 2016-02-10
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/041026 | Method of packaging integrated circuit die and device | Feb 9, 2016 | Issued |
Array
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[patent_issue_date] => 2017-02-14
[patent_title] => 'Stacked nanowire semiconductor device'
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[patent_app_number] => 14/988083
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/988083 | Stacked nanowire semiconductor device | Jan 4, 2016 | Issued |
Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/985264 | Dual gate FD-SOI transistor | Dec 29, 2015 | Issued |
Array
(
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[patent_title] => HEMT transistor
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/535933 | HEMT transistor | Dec 14, 2015 | Issued |
Array
(
[id] => 12477684
[patent_doc_number] => 09991149
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[patent_issue_date] => 2018-06-05
[patent_title] => Semiconductor bonding with compliant resin and utilizing hydrogen implantation for transfer-wafer removal
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[patent_app_number] => 14/933694
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/933694 | Semiconductor bonding with compliant resin and utilizing hydrogen implantation for transfer-wafer removal | Nov 4, 2015 | Issued |
Array
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[id] => 16575095
[patent_doc_number] => 10897023
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[patent_issue_date] => 2021-01-19
[patent_title] => All quantum dot based optoelectronic device
[patent_app_type] => utility
[patent_app_number] => 15/765396
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/765396 | All quantum dot based optoelectronic device | Oct 1, 2015 | Issued |
Array
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[id] => 10674126
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[patent_issue_date] => 2016-01-21
[patent_title] => 'METAL-INSULATOR-METAL CAPACITOR, ELECTRONIC DEVICE INCLUDING THE SAME, AND METHOD OF FABRICATING THE SAME'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/872821 | METAL-INSULATOR-METAL CAPACITOR, ELECTRONIC DEVICE INCLUDING THE SAME, AND METHOD OF FABRICATING THE SAME | Sep 30, 2015 | Abandoned |
Array
(
[id] => 16187167
[patent_doc_number] => 10720508
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[patent_issue_date] => 2020-07-21
[patent_title] => Fabrication of multi-channel nanowire devices with self-aligned internal spacers and SOI FinFETs using selective silicon nitride capping
[patent_app_type] => utility
[patent_app_number] => 15/750158
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/750158 | Fabrication of multi-channel nanowire devices with self-aligned internal spacers and SOI FinFETs using selective silicon nitride capping | Sep 24, 2015 | Issued |
Array
(
[id] => 11660325
[patent_doc_number] => 09673339
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[patent_issue_date] => 2017-06-06
[patent_title] => 'Semiconductor storage device and manufacturing method thereof'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/839586 | Semiconductor storage device and manufacturing method thereof | Aug 27, 2015 | Issued |
Array
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[id] => 10984336
[patent_doc_number] => 20160181281
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[patent_issue_date] => 2016-06-23
[patent_title] => 'DISPLAY PANEL HAVING IMPROVED BRIGHTNESS AND METHOD FOR FABRICATING THE SAME'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/813556 | Display panel having improved brightness and method for fabricating the same | Jul 29, 2015 | Issued |
Array
(
[id] => 13201591
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[patent_title] => Die bonding to a board
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/812846 | Die bonding to a board | Jul 28, 2015 | Issued |
Array
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[id] => 10817397
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[patent_title] => 'METHOD FOR RECESSING A CARBON-DOPED LAYER OF A SEMICONDUCTOR STRUCTURE'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/812046 | Method for recessing a carbon-doped layer of a semiconductor structure | Jul 28, 2015 | Issued |
Array
(
[id] => 10448051
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/810269 | FIELD EFFECT TRANSISTOR STRUCTURE HAVING ONE OR MORE FINS | Jul 26, 2015 | Abandoned |
Array
(
[id] => 10426068
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/792395 | SEMICONDUCTOR INTEGRATED CIRCUIT MANUFACTURING METHOD | Jul 5, 2015 | Abandoned |
Array
(
[id] => 14153029
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Array
(
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/656089 | Low resistance contact for semiconductor devices | Mar 11, 2015 | Issued |