Brian R. Peugh

Array ( [id] => 20421694 [patent_doc_number] => 20250383779 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-18 [patent_title] => DIGITAL CIRCUIT AND METHOD OF OPERATION IN A DIGITAL CIRCUIT [patent_app_type] => utility [patent_app_number] => 19/233208 [patent_app_country] => US [patent_app_date] => 2025-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2381 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19233208 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20460863 [patent_doc_number] => 20260010289 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-08 [patent_title] => SEMICONDUCTOR DEVICE, STORAGE SYSTEM AND OPERATION METHOD [patent_app_type] => utility [patent_app_number] => 19/227499 [patent_app_country] => US [patent_app_date] => 2025-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 978 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19227499 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20500468 [patent_doc_number] => 20260029928 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-29 [patent_title] => NON-VOLATILE MEMORY CONTROLLER AND METHOD FOR CONTROLLING A NON-VOLATILE MEMORY [patent_app_type] => utility [patent_app_number] => 19/172981 [patent_app_country] => US [patent_app_date] => 2025-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19172981 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20087354 [patent_doc_number] => 20250217290 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-03 [patent_title] => APPARATUS AND METHOD FOR ADJUSTING CACHE ALLOCATED FOR READ LOOK AHEAD [patent_app_type] => utility [patent_app_number] => 19/063303 [patent_app_country] => US [patent_app_date] => 2025-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6392 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19063303 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20181177 [patent_doc_number] => 20250265135 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-21 [patent_title] => BLOCK-STORAGE SERVICE SUPPORTING MULTI-ATTACH AND HEALTH CHECK FAILOVER MECHANISM [patent_app_type] => utility [patent_app_number] => 19/063107 [patent_app_country] => US [patent_app_date] => 2025-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18807 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19063107 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20052130 [patent_doc_number] => 20250190352 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-12 [patent_title] => Optimizing Transfer Of Small Files Of A Storage System [patent_app_type] => utility [patent_app_number] => 19/048602 [patent_app_country] => US [patent_app_date] => 2025-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 40124 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19048602 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20208482 [patent_doc_number] => 20250278202 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-04 [patent_title] => EDGE BLOCK ASSIGNMENT TO SINGLE LEVEL CELL (SLC) MODE IN MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 19/047040 [patent_app_country] => US [patent_app_date] => 2025-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3723 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19047040 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20365766 [patent_doc_number] => 20250355578 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-11-20 [patent_title] => SELECTIVE DATA CORRUPTION BEFORE ACTUAL ERASE OPERATION FOR DATA SECURITY [patent_app_type] => utility [patent_app_number] => 19/032050 [patent_app_country] => US [patent_app_date] => 2025-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1145 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19032050 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20866915 [patent_doc_number] => 12693808 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-07-28 [patent_title] => Data read/write method, controller, and storage device [patent_app_type] => utility [patent_app_number] => 19/025576 [patent_app_country] => US [patent_app_date] => 2025-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 6448 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19025576 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20123107 [patent_doc_number] => 20250238138 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-24 [patent_title] => TECHNIQUES TO IMPROVE BOOT UP LATENCY OF A MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 19/022872 [patent_app_country] => US [patent_app_date] => 2025-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4972 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -29 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19022872 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20020822 [patent_doc_number] => 20250159044 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-15 [patent_title] => MULTI-PLATFORM DATA STORAGE SYSTEM SUPPORTING VIRTUAL STORAGE RESOURCES [patent_app_type] => utility [patent_app_number] => 19/019439 [patent_app_country] => US [patent_app_date] => 2025-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18949 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19019439 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20773283 [patent_doc_number] => 12656956 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-06-16 [patent_title] => Monitoring write amplification metrics for a flash-based storage system [patent_app_type] => utility [patent_app_number] => 19/011807 [patent_app_country] => US [patent_app_date] => 2025-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 25 [patent_no_of_words] => 36936 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19011807 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20421705 [patent_doc_number] => 20250383790 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-18 [patent_title] => MEMORY CONTROLLER, MEMORY SYSTEM INCLUDING THE SAME AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/987084 [patent_app_country] => US [patent_app_date] => 2024-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6335 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18987084 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20070541 [patent_doc_number] => 20250208763 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-26 [patent_title] => INFORMATION PROCESSING SYSTEM AND INFORMATION PROCESSING METHOD [patent_app_type] => utility [patent_app_number] => 18/987300 [patent_app_country] => US [patent_app_date] => 2024-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4198 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18987300 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20487304 [patent_doc_number] => 20260023503 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-22 [patent_title] => STORAGE DEVICE USING SEPARATE COMMAND/ADDRESS INTERFACE AND OPERATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/985425 [patent_app_country] => US [patent_app_date] => 2024-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6659 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18985425 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20640918 [patent_doc_number] => 20260099274 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-04-09 [patent_title] => DATA STORAGE DEVICE WITH DIRECTIONAL DATA TRAFFIC MANAGEMENT [patent_app_type] => utility [patent_app_number] => 18/976854 [patent_app_country] => US [patent_app_date] => 2024-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18976854 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20094940 [patent_doc_number] => 20250224876 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-10 [patent_title] => MEMORY DEVICE INCLUDING INTERFACE CIRCUIT AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/976796 [patent_app_country] => US [patent_app_date] => 2024-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4687 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18976796 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20764561 [patent_doc_number] => 20260161545 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-06-11 [patent_title] => Customization of bandwidth of a Logical Memory Device Attached to a Host Processor over a Compute Express Link Fabric [patent_app_type] => utility [patent_app_number] => 18/977752 [patent_app_country] => US [patent_app_date] => 2024-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 26803 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18977752 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19818904 [patent_doc_number] => 20250077111 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-06 [patent_title] => Authentication of Sanitize Erase [patent_app_type] => utility [patent_app_number] => 18/950918 [patent_app_country] => US [patent_app_date] => 2024-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6164 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18950918 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20595341 [patent_doc_number] => 12579058 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-17 [patent_title] => Memory device, memory system including memory device, and operating method of memory device [patent_app_type] => utility [patent_app_number] => 18/946517 [patent_app_country] => US [patent_app_date] => 2024-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 12625 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18946517 [rel_patent_id] =>[rel_patent_doc_number] =>)