Search

Brian R. Peugh

Examiner (ID: 13526, Phone: (571)272-4199 , Office: P/2137 )

Most Active Art Unit
2187
Art Unit(s)
2186, 2133, 2137, 2752, 2187
Total Applications
1497
Issued Applications
1364
Pending Applications
60
Abandoned Applications
95

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 15594525 [patent_doc_number] => 20200073797 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-05 [patent_title] => MAINTAINING CORRECTNESS OF POINTERS FROM A MANAGED HEAP TO OFF-HEAP MEMORY [patent_app_type] => utility [patent_app_number] => 16/115642 [patent_app_country] => US [patent_app_date] => 2018-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6217 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16115642 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/115642
Maintaining correctness of pointers from a managed heap to off-heap memory Aug 28, 2018 Issued
Array ( [id] => 15425537 [patent_doc_number] => 10545697 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-01-28 [patent_title] => Reverse order request queueing by para-virtual device drivers [patent_app_type] => utility [patent_app_number] => 16/116514 [patent_app_country] => US [patent_app_date] => 2018-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 15798 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16116514 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/116514
Reverse order request queueing by para-virtual device drivers Aug 28, 2018 Issued
Array ( [id] => 13627187 [patent_doc_number] => 20180365145 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-20 [patent_title] => MANAGING INPUT/OUTPUT OPERATIONS FOR SHINGLED MAGNETIC RECORDING IN A STORAGE SYSTEM [patent_app_type] => utility [patent_app_number] => 16/113719 [patent_app_country] => US [patent_app_date] => 2018-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7231 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16113719 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/113719
Managing input/output operations for shingled magnetic recording in a storage system Aug 26, 2018 Issued
Array ( [id] => 13610871 [patent_doc_number] => 20180356985 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-13 [patent_title] => HYBRID MEMORY DRIVES, COMPUTER SYSTEM, AND RELATED METHOD FOR OPERATING A MULTI-MODE HYBRID DRIVE [patent_app_type] => utility [patent_app_number] => 16/108341 [patent_app_country] => US [patent_app_date] => 2018-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4379 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16108341 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/108341
Hybrid memory drives, computer system, and related method for operating a multi-mode hybrid drive Aug 21, 2018 Issued
Array ( [id] => 13906431 [patent_doc_number] => 20190042420 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-07 [patent_title] => MEMORY CARD WITH VOLATILE AND NON VOLATILE MEMORY SPACE HAVING MULTIPLE USAGE MODEL CONFIGURATIONS [patent_app_type] => utility [patent_app_number] => 16/102604 [patent_app_country] => US [patent_app_date] => 2018-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4997 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16102604 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/102604
Memory card with volatile and non volatile memory space having multiple usage model configurations Aug 12, 2018 Issued
Array ( [id] => 15313271 [patent_doc_number] => 10521340 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-31 [patent_title] => Memory system and operating method thereof [patent_app_type] => utility [patent_app_number] => 16/040213 [patent_app_country] => US [patent_app_date] => 2018-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 12516 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16040213 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/040213
Memory system and operating method thereof Jul 18, 2018 Issued
Array ( [id] => 14506605 [patent_doc_number] => 20190196957 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-27 [patent_title] => MEMORY SYSTEM AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/040167 [patent_app_country] => US [patent_app_date] => 2018-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9215 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16040167 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/040167
Memory system and operating method thereof Jul 18, 2018 Issued
Array ( [id] => 13875975 [patent_doc_number] => 20190034328 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-31 [patent_title] => SEMICONDUCTOR MEMORY HAVING RADIO COMMUNICATION FUNCTION AND WRITE CONTROL METHOD [patent_app_type] => utility [patent_app_number] => 16/038676 [patent_app_country] => US [patent_app_date] => 2018-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8906 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16038676 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/038676
Semiconductor memory having radio communication function and write control method Jul 17, 2018 Issued
Array ( [id] => 15367421 [patent_doc_number] => 20200019475 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-16 [patent_title] => SCALABLE, PERSISTENT, HIGH PERFORMANCE AND CRASH RESILIENT METADATA MICROSERVICE [patent_app_type] => utility [patent_app_number] => 16/032960 [patent_app_country] => US [patent_app_date] => 2018-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8533 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16032960 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/032960
Scalable, persistent, high performance and crash resilient metadata microservice Jul 10, 2018 Issued
Array ( [id] => 13540625 [patent_doc_number] => 20180321859 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-08 [patent_title] => FLASH-BASED ACCELERATOR AND COMPUTING DEVICE INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 16/032817 [patent_app_country] => US [patent_app_date] => 2018-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9827 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16032817 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/032817
Flash-based accelerator and computing device including the same Jul 10, 2018 Issued
Array ( [id] => 16964746 [patent_doc_number] => 20210216245 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-15 [patent_title] => METHOD OF DISTRIBUTED DATA REDUNDANCY STORAGE USING CONSISTENT HASHING [patent_app_type] => utility [patent_app_number] => 17/059438 [patent_app_country] => US [patent_app_date] => 2018-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5539 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17059438 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/059438
Method of distributed data redundancy storage using consistent hashing Jul 9, 2018 Issued
Array ( [id] => 15257899 [patent_doc_number] => 20190377683 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-12 [patent_title] => CACHE PRE-FETCHING USING CYCLIC BUFFER [patent_app_type] => utility [patent_app_number] => 16/016216 [patent_app_country] => US [patent_app_date] => 2018-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11506 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16016216 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/016216
Cache pre-fetching using cyclic buffer Jun 21, 2018 Issued
Array ( [id] => 13905807 [patent_doc_number] => 20190042108 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-07 [patent_title] => NONVOLATILE MEMORY STORE SUPPRESION [patent_app_type] => utility [patent_app_number] => 16/015517 [patent_app_country] => US [patent_app_date] => 2018-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5993 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16015517 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/015517
Nonvolatile memory store suppresion Jun 21, 2018 Issued
Array ( [id] => 13906423 [patent_doc_number] => 20190042416 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-07 [patent_title] => NON-VOLATILE MEMORY AWARE CACHING POLICIES [patent_app_type] => utility [patent_app_number] => 16/015880 [patent_app_country] => US [patent_app_date] => 2018-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12540 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16015880 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/015880
Non-volatile memory aware caching policies Jun 21, 2018 Issued
Array ( [id] => 13906423 [patent_doc_number] => 20190042416 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-07 [patent_title] => NON-VOLATILE MEMORY AWARE CACHING POLICIES [patent_app_type] => utility [patent_app_number] => 16/015880 [patent_app_country] => US [patent_app_date] => 2018-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12540 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16015880 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/015880
Non-volatile memory aware caching policies Jun 21, 2018 Issued
Array ( [id] => 16186119 [patent_doc_number] => 10719452 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-21 [patent_title] => Hardware-based virtual-to-physical address translation for programmable logic masters in a system on chip [patent_app_type] => utility [patent_app_number] => 16/016349 [patent_app_country] => US [patent_app_date] => 2018-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5125 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16016349 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/016349
Hardware-based virtual-to-physical address translation for programmable logic masters in a system on chip Jun 21, 2018 Issued
Array ( [id] => 13906423 [patent_doc_number] => 20190042416 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-07 [patent_title] => NON-VOLATILE MEMORY AWARE CACHING POLICIES [patent_app_type] => utility [patent_app_number] => 16/015880 [patent_app_country] => US [patent_app_date] => 2018-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12540 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16015880 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/015880
Non-volatile memory aware caching policies Jun 21, 2018 Issued
Array ( [id] => 13906423 [patent_doc_number] => 20190042416 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-07 [patent_title] => NON-VOLATILE MEMORY AWARE CACHING POLICIES [patent_app_type] => utility [patent_app_number] => 16/015880 [patent_app_country] => US [patent_app_date] => 2018-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12540 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16015880 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/015880
Non-volatile memory aware caching policies Jun 21, 2018 Issued
Array ( [id] => 17492274 [patent_doc_number] => 11281577 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-03-22 [patent_title] => Garbage collection tuning for low drive wear [patent_app_type] => utility [patent_app_number] => 16/012243 [patent_app_country] => US [patent_app_date] => 2018-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 22 [patent_no_of_words] => 26612 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16012243 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/012243
Garbage collection tuning for low drive wear Jun 18, 2018 Issued
Array ( [id] => 15257515 [patent_doc_number] => 20190377491 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-12 [patent_title] => STORAGE SYSTEM INDEXED USING PERSISTENT METADATA STRUCTURES [patent_app_type] => utility [patent_app_number] => 16/002804 [patent_app_country] => US [patent_app_date] => 2018-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6357 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16002804 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/002804
Storage system indexed using persistent metadata structures Jun 6, 2018 Issued
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