Brian R. Peugh

Array ( [id] => 6035924 [patent_doc_number] => 20110082975 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-07 [patent_title] => 'DISK ARRAY SYSTEM AND METHOD FOR CONTROLLING DISK ARRAY SYSTEM' [patent_app_type] => utility [patent_app_number] => 12/964337 [patent_app_country] => US [patent_app_date] => 2010-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 9046 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0082/20110082975.pdf [firstpage_image] =>[orig_patent_app_number] => 12964337 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6104840 [patent_doc_number] => 20110167222 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-07-07 [patent_title] => 'UNBOUNDED TRANSACTIONAL MEMORY SYSTEM AND METHOD' [patent_app_type] => utility [patent_app_number] => 12/964128 [patent_app_country] => US [patent_app_date] => 2010-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 10136 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0167/20110167222.pdf [firstpage_image] =>[orig_patent_app_number] => 12964128 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9062779 [patent_doc_number] => 08549232 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-01 [patent_title] => 'Information processing device and cache memory control device' [patent_app_type] => utility [patent_app_number] => 12/964199 [patent_app_country] => US [patent_app_date] => 2010-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 22 [patent_no_of_words] => 10755 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12964199 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8242382 [patent_doc_number] => 20120151120 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-14 [patent_title] => 'SYSTEMS AND METHODS FOR HANDLING NON-VOLATILE MEMORY OPERATING AT A SUBSTANTIALLY FULL CAPACITY' [patent_app_type] => utility [patent_app_number] => 12/964423 [patent_app_country] => US [patent_app_date] => 2010-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5538 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12964423 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7756410 [patent_doc_number] => 08112581 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-02-07 [patent_title] => 'Caching in multicore and multiprocessor architectures' [patent_app_type] => utility [patent_app_number] => 12/958920 [patent_app_country] => US [patent_app_date] => 2010-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 17203 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/112/08112581.pdf [firstpage_image] =>[orig_patent_app_number] => 12958920 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6031340 [patent_doc_number] => 20110055466 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-03 [patent_title] => 'NONVOLATILE MEMORY SYSTEM, AND DATA READ/WRITE METHOD FOR NONVOLATILE MEMORY SYSTEM' [patent_app_type] => utility [patent_app_number] => 12/941710 [patent_app_country] => US [patent_app_date] => 2010-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 113 [patent_figures_cnt] => 113 [patent_no_of_words] => 14188 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0055/20110055466.pdf [firstpage_image] =>[orig_patent_app_number] => 12941710 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5948462 [patent_doc_number] => 20110107041 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-05 [patent_title] => 'METHOD FOR EXECUTING DATA UPDATES IN AN IC CARD' [patent_app_type] => utility [patent_app_number] => 12/915668 [patent_app_country] => US [patent_app_date] => 2010-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4171 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0107/20110107041.pdf [firstpage_image] =>[orig_patent_app_number] => 12915668 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8349147 [patent_doc_number] => 20120210069 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-16 [patent_title] => 'SHARED CACHE FOR A TIGHTLY-COUPLED MULTIPROCESSOR' [patent_app_type] => utility [patent_app_number] => 13/503371 [patent_app_country] => US [patent_app_date] => 2010-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 14962 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13503371 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8349131 [patent_doc_number] => 20120210054 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-16 [patent_title] => 'DATA STORAGE MEDIUM HAVING SECURITY FUNCTION AND OUTPUT APPARATUS THEREFOR' [patent_app_type] => utility [patent_app_number] => 13/503511 [patent_app_country] => US [patent_app_date] => 2010-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3949 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13503511 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6035917 [patent_doc_number] => 20110082968 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-07 [patent_title] => 'NONVOLATILE MEMORY SYSTEM, AND DATA READ/WRITE METHOD FOR NONVOLATILE MEMORY SYSTEM' [patent_app_type] => utility [patent_app_number] => 12/900980 [patent_app_country] => US [patent_app_date] => 2010-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 118 [patent_figures_cnt] => 118 [patent_no_of_words] => 15043 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0082/20110082968.pdf [firstpage_image] =>[orig_patent_app_number] => 12900980 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8746604 [patent_doc_number] => 20130086321 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-04 [patent_title] => 'FILE BASED CACHE LOADING' [patent_app_type] => utility [patent_app_number] => 13/702759 [patent_app_country] => US [patent_app_date] => 2010-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2559 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13702759 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5996239 [patent_doc_number] => 20110016276 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-20 [patent_title] => 'SYSTEM AND METHOD FOR CACHE MANAGEMENT' [patent_app_type] => utility [patent_app_number] => 12/840728 [patent_app_country] => US [patent_app_date] => 2010-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 12594 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0016/20110016276.pdf [firstpage_image] =>[orig_patent_app_number] => 12840728 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8189161 [patent_doc_number] => 20120117338 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-10 [patent_title] => 'METHOD AND SYSTEM FOR SYNCHRONIZING ADDRESS AND CONTROL SIGNALS IN THREADED MEMORY MODULES' [patent_app_type] => utility [patent_app_number] => 13/384585 [patent_app_country] => US [patent_app_date] => 2010-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6803 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0117/20120117338.pdf [firstpage_image] =>[orig_patent_app_number] => 13384585 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9156723 [patent_doc_number] => 08589636 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-11-19 [patent_title] => 'Cache memory device, processor, and processing method' [patent_app_type] => utility [patent_app_number] => 12/801869 [patent_app_country] => US [patent_app_date] => 2010-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 8224 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12801869 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4549167 [patent_doc_number] => 07925852 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-04-12 [patent_title] => 'Storage controller and data management method' [patent_app_type] => utility [patent_app_number] => 12/822874 [patent_app_country] => US [patent_app_date] => 2010-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 56 [patent_no_of_words] => 22520 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 419 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/925/07925852.pdf [firstpage_image] =>[orig_patent_app_number] => 12822874 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9229751 [patent_doc_number] => 08635430 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-01-21 [patent_title] => 'Translation of input/output addresses to memory addresses' [patent_app_type] => utility [patent_app_number] => 12/821170 [patent_app_country] => US [patent_app_date] => 2010-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 25 [patent_no_of_words] => 18346 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12821170 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9077398 [patent_doc_number] => 08554990 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-08 [patent_title] => 'Nonvolatile memory system and related method of preserving stored data during power interruption' [patent_app_type] => utility [patent_app_number] => 12/821338 [patent_app_country] => US [patent_app_date] => 2010-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 19 [patent_no_of_words] => 8247 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12821338 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8207934 [patent_doc_number] => 08190817 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-05-29 [patent_title] => 'Raid control apparatus and RAID system' [patent_app_type] => utility [patent_app_number] => 12/820641 [patent_app_country] => US [patent_app_date] => 2010-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 6526 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/190/08190817.pdf [firstpage_image] =>[orig_patent_app_number] => 12820641 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8971690 [patent_doc_number] => 08510518 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-08-13 [patent_title] => 'Bandwidth adaptive memory compression' [patent_app_type] => utility [patent_app_number] => 12/820300 [patent_app_country] => US [patent_app_date] => 2010-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2780 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 32 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12820300 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7664958 [patent_doc_number] => 20110314227 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-22 [patent_title] => 'Horizontal Cache Persistence In A Multi-Compute Node, Symmetric Multiprocessing Computer' [patent_app_type] => utility [patent_app_number] => 12/819348 [patent_app_country] => US [patent_app_date] => 2010-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9423 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12819348 [rel_patent_id] =>[rel_patent_doc_number] =>)