
Brian R. Peugh
Examiner (ID: 4152, Phone: (571)272-4199 , Office: P/2137 )
| Most Active Art Unit | 2187 |
| Art Unit(s) | 2752, 2133, 2186, 2187, 2137 |
| Total Applications | 1499 |
| Issued Applications | 1364 |
| Pending Applications | 61 |
| Abandoned Applications | 95 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4522230
[patent_doc_number] => 07917718
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-03-29
[patent_title] => 'Arrangements having security protection'
[patent_app_type] => utility
[patent_app_number] => 12/706285
[patent_app_country] => US
[patent_app_date] => 2010-02-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 6793
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 178
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/917/07917718.pdf
[firstpage_image] =>[orig_patent_app_number] => 12706285
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/706285 | Arrangements having security protection | Feb 15, 2010 | Issued |
Array
(
[id] => 8971698
[patent_doc_number] => 08510526
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-08-13
[patent_title] => 'Storage apparatus and snapshot control method of the same'
[patent_app_type] => utility
[patent_app_number] => 12/811401
[patent_app_country] => US
[patent_app_date] => 2010-01-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 24
[patent_no_of_words] => 10695
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 117
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12811401
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/811401 | Storage apparatus and snapshot control method of the same | Jan 28, 2010 | Issued |
Array
(
[id] => 8546327
[patent_doc_number] => 08321630
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2012-11-27
[patent_title] => 'Application-transparent hybridized caching for high-performance storage'
[patent_app_type] => utility
[patent_app_number] => 12/695552
[patent_app_country] => US
[patent_app_date] => 2010-01-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 7067
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12695552
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/695552 | Application-transparent hybridized caching for high-performance storage | Jan 27, 2010 | Issued |
Array
(
[id] => 4443174
[patent_doc_number] => 07899981
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-03-01
[patent_title] => 'Flash memory storage system'
[patent_app_type] => utility
[patent_app_number] => 12/617765
[patent_app_country] => US
[patent_app_date] => 2009-11-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 23
[patent_no_of_words] => 18170
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 105
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/899/07899981.pdf
[firstpage_image] =>[orig_patent_app_number] => 12617765
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/617765 | Flash memory storage system | Nov 12, 2009 | Issued |
Array
(
[id] => 5948390
[patent_doc_number] => 20110107019
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-05-05
[patent_title] => 'APP (A PRIORI PROBABILITY) STORAGE DESIGN FOR LTE TURBO DECODER WITH QUADRATIC PERMUTATION POLYNOMIAL INTERLEAVER'
[patent_app_type] => utility
[patent_app_number] => 12/608919
[patent_app_country] => US
[patent_app_date] => 2009-10-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 8443
[patent_no_of_claims] => 58
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0107/20110107019.pdf
[firstpage_image] =>[orig_patent_app_number] => 12608919
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/608919 | APP (a priori probability) storage design for LTE turbo decoder with quadratic permutation polynomial interleaver | Oct 28, 2009 | Issued |
Array
(
[id] => 8787002
[patent_doc_number] => 08433856
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-04-30
[patent_title] => 'Pseudo least recently used replacement/allocation scheme in request agent affinitive set-associative snoop filter'
[patent_app_type] => utility
[patent_app_number] => 12/558796
[patent_app_country] => US
[patent_app_date] => 2009-09-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 4063
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 185
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12558796
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/558796 | Pseudo least recently used replacement/allocation scheme in request agent affinitive set-associative snoop filter | Sep 13, 2009 | Issued |
Array
(
[id] => 9289254
[patent_doc_number] => 08645610
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-02-04
[patent_title] => 'Organizing and managing a memory blade with super pages and buffers'
[patent_app_type] => utility
[patent_app_number] => 13/257271
[patent_app_country] => US
[patent_app_date] => 2009-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 22
[patent_no_of_words] => 8940
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 46
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13257271
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/257271 | Organizing and managing a memory blade with super pages and buffers | Jun 28, 2009 | Issued |
Array
(
[id] => 7495060
[patent_doc_number] => 08032697
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-10-04
[patent_title] => 'Method and system for responding to file system requests'
[patent_app_type] => utility
[patent_app_number] => 12/459043
[patent_app_country] => US
[patent_app_date] => 2009-06-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 12
[patent_no_of_words] => 9353
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 261
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/032/08032697.pdf
[firstpage_image] =>[orig_patent_app_number] => 12459043
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/459043 | Method and system for responding to file system requests | Jun 25, 2009 | Issued |
Array
(
[id] => 5399667
[patent_doc_number] => 20090319730
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-12-24
[patent_title] => 'MEMORY SYSTEM, ACCESS CONTROL METHOD THEREFOR, AND COMPUTER PROGRAM'
[patent_app_type] => utility
[patent_app_number] => 12/485214
[patent_app_country] => US
[patent_app_date] => 2009-06-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 4376
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0319/20090319730.pdf
[firstpage_image] =>[orig_patent_app_number] => 12485214
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/485214 | Memory system, access control method therefor, and computer program | Jun 15, 2009 | Issued |
Array
(
[id] => 8285629
[patent_doc_number] => 08219741
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-07-10
[patent_title] => 'Hardware and operating system support for persistent memory on a memory bus'
[patent_app_type] => utility
[patent_app_number] => 12/485124
[patent_app_country] => US
[patent_app_date] => 2009-06-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 11476
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 58
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12485124
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/485124 | Hardware and operating system support for persistent memory on a memory bus | Jun 15, 2009 | Issued |
Array
(
[id] => 6395933
[patent_doc_number] => 20100318744
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-12-16
[patent_title] => 'DIFFERENTIAL CACHING MECHANISM BASED ON MEDIA I/O SPEED'
[patent_app_type] => utility
[patent_app_number] => 12/484963
[patent_app_country] => US
[patent_app_date] => 2009-06-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 5233
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0318/20100318744.pdf
[firstpage_image] =>[orig_patent_app_number] => 12484963
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/484963 | Differential caching mechanism based on media I/O speed | Jun 14, 2009 | Issued |
Array
(
[id] => 7798358
[patent_doc_number] => 08127076
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-02-28
[patent_title] => 'Method and system for placement of data on a storage device'
[patent_app_type] => utility
[patent_app_number] => 12/479394
[patent_app_country] => US
[patent_app_date] => 2009-06-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 12
[patent_no_of_words] => 12191
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 106
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/127/08127076.pdf
[firstpage_image] =>[orig_patent_app_number] => 12479394
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/479394 | Method and system for placement of data on a storage device | Jun 4, 2009 | Issued |
Array
(
[id] => 5305671
[patent_doc_number] => 20090300323
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-12-03
[patent_title] => 'Vector Processor System'
[patent_app_type] => utility
[patent_app_number] => 12/475393
[patent_app_country] => US
[patent_app_date] => 2009-05-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 33
[patent_figures_cnt] => 33
[patent_no_of_words] => 12008
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0300/20090300323.pdf
[firstpage_image] =>[orig_patent_app_number] => 12475393
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/475393 | Vector processor system | May 28, 2009 | Issued |
Array
(
[id] => 9527453
[patent_doc_number] => 08751744
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-06-10
[patent_title] => 'Integrated circuit comprising trace logic and method for providing trace information'
[patent_app_type] => utility
[patent_app_number] => 13/318542
[patent_app_country] => US
[patent_app_date] => 2009-05-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 4117
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13318542
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/318542 | Integrated circuit comprising trace logic and method for providing trace information | May 28, 2009 | Issued |
Array
(
[id] => 7746204
[patent_doc_number] => 08108592
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-01-31
[patent_title] => 'Memory system and wear leveling method thereof'
[patent_app_type] => utility
[patent_app_number] => 12/385160
[patent_app_country] => US
[patent_app_date] => 2009-03-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 8
[patent_no_of_words] => 4237
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 72
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/108/08108592.pdf
[firstpage_image] =>[orig_patent_app_number] => 12385160
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/385160 | Memory system and wear leveling method thereof | Mar 30, 2009 | Issued |
Array
(
[id] => 6363673
[patent_doc_number] => 20100250879
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-09-30
[patent_title] => 'DATA MANIPULATION METHOD OF LOGICAL VOLUME MANAGER'
[patent_app_type] => utility
[patent_app_number] => 12/412133
[patent_app_country] => US
[patent_app_date] => 2009-03-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 1968
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0250/20100250879.pdf
[firstpage_image] =>[orig_patent_app_number] => 12412133
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/412133 | Data manipulation method of logical volume manager | Mar 25, 2009 | Issued |
Array
(
[id] => 7682608
[patent_doc_number] => 20100241803
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-09-23
[patent_title] => 'GLOBAL SPARE'
[patent_app_type] => utility
[patent_app_number] => 12/407919
[patent_app_country] => US
[patent_app_date] => 2009-03-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 7575
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0241/20100241803.pdf
[firstpage_image] =>[orig_patent_app_number] => 12407919
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/407919 | Global spare | Mar 19, 2009 | Issued |
Array
(
[id] => 6584427
[patent_doc_number] => 20100235587
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-09-16
[patent_title] => 'Staged Software Transactional Memory'
[patent_app_type] => utility
[patent_app_number] => 12/404351
[patent_app_country] => US
[patent_app_date] => 2009-03-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 1585
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0235/20100235587.pdf
[firstpage_image] =>[orig_patent_app_number] => 12404351
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/404351 | Staged Software Transactional Memory | Mar 15, 2009 | Abandoned |
Array
(
[id] => 5344309
[patent_doc_number] => 20090182959
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-07-16
[patent_title] => 'Optimizing reclamation of data space'
[patent_app_type] => utility
[patent_app_number] => 12/381888
[patent_app_country] => US
[patent_app_date] => 2009-03-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 16348
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0182/20090182959.pdf
[firstpage_image] =>[orig_patent_app_number] => 12381888
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/381888 | Optimizing reclamation of data space | Mar 15, 2009 | Issued |
Array
(
[id] => 6584562
[patent_doc_number] => 20100235596
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-09-16
[patent_title] => 'Offline Device-Side Logical Unit Number Controller'
[patent_app_type] => utility
[patent_app_number] => 12/400801
[patent_app_country] => US
[patent_app_date] => 2009-03-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 4871
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0235/20100235596.pdf
[firstpage_image] =>[orig_patent_app_number] => 12400801
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/400801 | Offline device-side logical unit number controller | Mar 9, 2009 | Issued |