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Brian Sattizahn

Examiner (ID: 8831)

Most Active Art Unit
2762
Art Unit(s)
2762
Total Applications
32
Issued Applications
31
Pending Applications
1
Abandoned Applications
0

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6441776 [patent_doc_number] => 20100038121 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-02-18 [patent_title] => 'Metal Deposition' [patent_app_type] => utility [patent_app_number] => 12/608297 [patent_app_country] => US [patent_app_date] => 2009-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 16084 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0038/20100038121.pdf [firstpage_image] =>[orig_patent_app_number] => 12608297 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/608297
Metal Deposition Oct 28, 2009 Abandoned
Array ( [id] => 6441752 [patent_doc_number] => 20100038119 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-02-18 [patent_title] => 'Metal Deposition' [patent_app_type] => utility [patent_app_number] => 12/608301 [patent_app_country] => US [patent_app_date] => 2009-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 16086 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0038/20100038119.pdf [firstpage_image] =>[orig_patent_app_number] => 12608301 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/608301
Metal Deposition Oct 28, 2009 Abandoned
Array ( [id] => 6192411 [patent_doc_number] => 20110024165 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-02-03 [patent_title] => 'SYSTEMS AND METHODS FOR COMPOSITE STRUCTURES WITH EMBEDDED INTERCONNECTS' [patent_app_type] => utility [patent_app_number] => 12/606462 [patent_app_country] => US [patent_app_date] => 2009-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1405 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0024/20110024165.pdf [firstpage_image] =>[orig_patent_app_number] => 12606462 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/606462
SYSTEMS AND METHODS FOR COMPOSITE STRUCTURES WITH EMBEDDED INTERCONNECTS Oct 26, 2009 Abandoned
Array ( [id] => 5978739 [patent_doc_number] => 20110094778 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-28 [patent_title] => 'CIRCUIT BOARD AND FABRICATION METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 12/606192 [patent_app_country] => US [patent_app_date] => 2009-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3481 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0094/20110094778.pdf [firstpage_image] =>[orig_patent_app_number] => 12606192 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/606192
CIRCUIT BOARD AND FABRICATION METHOD THEREOF Oct 26, 2009 Abandoned
Array ( [id] => 6277960 [patent_doc_number] => 20100155116 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-06-24 [patent_title] => 'PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/606546 [patent_app_country] => US [patent_app_date] => 2009-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7576 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0155/20100155116.pdf [firstpage_image] =>[orig_patent_app_number] => 12606546 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/606546
Printed wiring board and method for manufacturing the same Oct 26, 2009 Issued
Array ( [id] => 6441830 [patent_doc_number] => 20100038127 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-02-18 [patent_title] => 'Power-Ground Plane Partitioning and Via Connection to Utilize Channel/Trenches for Power Delivery' [patent_app_type] => utility [patent_app_number] => 12/605198 [patent_app_country] => US [patent_app_date] => 2009-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3660 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0038/20100038127.pdf [firstpage_image] =>[orig_patent_app_number] => 12605198 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/605198
Power-ground plane partitioning and via connection to utilize channel/trenches for power delivery Oct 22, 2009 Issued
Array ( [id] => 8538623 [patent_doc_number] => 08314344 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-11-20 [patent_title] => 'Wiring board and manufacturing method of the same' [patent_app_type] => utility [patent_app_number] => 12/573256 [patent_app_country] => US [patent_app_date] => 2009-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 33 [patent_no_of_words] => 15520 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12573256 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/573256
Wiring board and manufacturing method of the same Oct 4, 2009 Issued
Array ( [id] => 8543822 [patent_doc_number] => 08319115 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-11-27 [patent_title] => 'Wiring board and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 12/562956 [patent_app_country] => US [patent_app_date] => 2009-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 13899 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12562956 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/562956
Wiring board and manufacturing method thereof Sep 17, 2009 Issued
Array ( [id] => 5460921 [patent_doc_number] => 20090321121 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-31 [patent_title] => 'CERAMIC MULTILAYER SUBSTRATE AND ITS MANUFACTURING METHOD' [patent_app_type] => utility [patent_app_number] => 12/552389 [patent_app_country] => US [patent_app_date] => 2009-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 9151 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0321/20090321121.pdf [firstpage_image] =>[orig_patent_app_number] => 12552389 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/552389
CERAMIC MULTILAYER SUBSTRATE AND ITS MANUFACTURING METHOD Sep 1, 2009 Abandoned
Array ( [id] => 6495442 [patent_doc_number] => 20100012357 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-01-21 [patent_title] => 'Printed Circuit Board With Improved Via Design' [patent_app_type] => utility [patent_app_number] => 12/548933 [patent_app_country] => US [patent_app_date] => 2009-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 10822 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0012/20100012357.pdf [firstpage_image] =>[orig_patent_app_number] => 12548933 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/548933
Printed circuit board with improved via design Aug 26, 2009 Issued
Array ( [id] => 6214741 [patent_doc_number] => 20100051341 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-04 [patent_title] => 'Circuit substrate having power/ground plane with grid holes' [patent_app_type] => utility [patent_app_number] => 12/583804 [patent_app_country] => US [patent_app_date] => 2009-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1764 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0051/20100051341.pdf [firstpage_image] =>[orig_patent_app_number] => 12583804 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/583804
Circuit substrate having power/ground plane with grid holes Aug 25, 2009 Issued
Array ( [id] => 9009743 [patent_doc_number] => 08525041 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-09-03 [patent_title] => 'Multilayer wiring board and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 12/543644 [patent_app_country] => US [patent_app_date] => 2009-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 44 [patent_no_of_words] => 7512 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12543644 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/543644
Multilayer wiring board and method for manufacturing the same Aug 18, 2009 Issued
Array ( [id] => 6129115 [patent_doc_number] => 20110005824 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-13 [patent_title] => 'PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/544100 [patent_app_country] => US [patent_app_date] => 2009-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3164 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0005/20110005824.pdf [firstpage_image] =>[orig_patent_app_number] => 12544100 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/544100
PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME Aug 18, 2009 Abandoned
Array ( [id] => 5364216 [patent_doc_number] => 20090301775 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-10 [patent_title] => 'Wired circuit board and electronic device' [patent_app_type] => utility [patent_app_number] => 12/461576 [patent_app_country] => US [patent_app_date] => 2009-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 12973 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0301/20090301775.pdf [firstpage_image] =>[orig_patent_app_number] => 12461576 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/461576
Wired circuit board and electronic device Aug 16, 2009 Abandoned
Array ( [id] => 8876188 [patent_doc_number] => 08471154 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-06-25 [patent_title] => 'Stackable variable height via package and method' [patent_app_type] => utility [patent_app_number] => 12/537048 [patent_app_country] => US [patent_app_date] => 2009-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 23 [patent_no_of_words] => 9730 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12537048 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/537048
Stackable variable height via package and method Aug 5, 2009 Issued
Array ( [id] => 6627952 [patent_doc_number] => 20100035021 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-02-11 [patent_title] => 'Method of manufacturing a substrate, substrate, device provided with a substrate, and determining method' [patent_app_type] => utility [patent_app_number] => 12/461268 [patent_app_country] => US [patent_app_date] => 2009-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4550 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0035/20100035021.pdf [firstpage_image] =>[orig_patent_app_number] => 12461268 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/461268
Method of manufacturing a substrate, substrate, device provided with a substrate, and determining method Aug 4, 2009 Issued
Array ( [id] => 4600400 [patent_doc_number] => 07977578 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-07-12 [patent_title] => 'Tab tape for tape carrier package' [patent_app_type] => utility [patent_app_number] => 12/458936 [patent_app_country] => US [patent_app_date] => 2009-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 3140 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/977/07977578.pdf [firstpage_image] =>[orig_patent_app_number] => 12458936 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/458936
Tab tape for tape carrier package Jul 27, 2009 Issued
Array ( [id] => 6147617 [patent_doc_number] => 20110019375 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-27 [patent_title] => 'Z-DIRECTED PASS-THROUGH COMPONENTS FOR PRINTED CIRCUIT BOARDS' [patent_app_type] => utility [patent_app_number] => 12/508145 [patent_app_country] => US [patent_app_date] => 2009-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 15849 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0019/20110019375.pdf [firstpage_image] =>[orig_patent_app_number] => 12508145 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/508145
Z-directed pass-through components for printed circuit boards Jul 22, 2009 Issued
Array ( [id] => 8858925 [patent_doc_number] => 08461460 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-11 [patent_title] => 'Microelectronic interconnect element with decreased conductor spacing' [patent_app_type] => utility [patent_app_number] => 12/459864 [patent_app_country] => US [patent_app_date] => 2009-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 34 [patent_no_of_words] => 7720 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12459864 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/459864
Microelectronic interconnect element with decreased conductor spacing Jul 7, 2009 Issued
Array ( [id] => 8115341 [patent_doc_number] => 08158888 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-04-17 [patent_title] => 'Circuit substrate and method of fabricating the same and chip package structure' [patent_app_type] => utility [patent_app_number] => 12/490077 [patent_app_country] => US [patent_app_date] => 2009-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 17 [patent_no_of_words] => 3813 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/158/08158888.pdf [firstpage_image] =>[orig_patent_app_number] => 12490077 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/490077
Circuit substrate and method of fabricating the same and chip package structure Jun 22, 2009 Issued
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