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Brian Sattizahn

Examiner (ID: 8831)

Most Active Art Unit
2762
Art Unit(s)
2762
Total Applications
32
Issued Applications
31
Pending Applications
1
Abandoned Applications
0

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5884765 [patent_doc_number] => 20060273816 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-07 [patent_title] => 'Circuit board having a reverse build-up structure' [patent_app_type] => utility [patent_app_number] => 11/407485 [patent_app_country] => US [patent_app_date] => 2006-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3448 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0273/20060273816.pdf [firstpage_image] =>[orig_patent_app_number] => 11407485 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/407485
Circuit board having a reverse build-up structure Apr 18, 2006 Abandoned
Array ( [id] => 5915157 [patent_doc_number] => 20060237228 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-26 [patent_title] => 'Printed circuit board having reduced parasitic capacitance pad' [patent_app_type] => utility [patent_app_number] => 11/403667 [patent_app_country] => US [patent_app_date] => 2006-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1589 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0237/20060237228.pdf [firstpage_image] =>[orig_patent_app_number] => 11403667 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/403667
Printed circuit board having reduced parasitic capacitance pad Apr 12, 2006 Abandoned
Array ( [id] => 5847404 [patent_doc_number] => 20060231289 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-19 [patent_title] => 'Printed circuit board structure' [patent_app_type] => utility [patent_app_number] => 11/402001 [patent_app_country] => US [patent_app_date] => 2006-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3165 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0231/20060231289.pdf [firstpage_image] =>[orig_patent_app_number] => 11402001 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/402001
Printed circuit board structure Apr 11, 2006 Abandoned
Array ( [id] => 5530060 [patent_doc_number] => 20090229848 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-09-17 [patent_title] => 'Superconducting cable' [patent_app_type] => utility [patent_app_number] => 11/661958 [patent_app_country] => US [patent_app_date] => 2006-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6992 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0229/20090229848.pdf [firstpage_image] =>[orig_patent_app_number] => 11661958 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/661958
Superconducting cable Apr 9, 2006 Abandoned
Array ( [id] => 4600401 [patent_doc_number] => 07977579 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-07-12 [patent_title] => 'Multiple flip-chip integrated circuit package system' [patent_app_type] => utility [patent_app_number] => 11/278070 [patent_app_country] => US [patent_app_date] => 2006-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 4666 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/977/07977579.pdf [firstpage_image] =>[orig_patent_app_number] => 11278070 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/278070
Multiple flip-chip integrated circuit package system Mar 29, 2006 Issued
Array ( [id] => 5122945 [patent_doc_number] => 20070235214 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-11 [patent_title] => 'Moisture resistant printed circuit board' [patent_app_type] => utility [patent_app_number] => 11/393329 [patent_app_country] => US [patent_app_date] => 2006-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 1596 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0235/20070235214.pdf [firstpage_image] =>[orig_patent_app_number] => 11393329 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/393329
Moisture resistant printed circuit board Mar 29, 2006 Abandoned
Array ( [id] => 5751093 [patent_doc_number] => 20060220242 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-05 [patent_title] => 'Method for producing flexible printed wiring board, and flexible printed wiring board' [patent_app_type] => utility [patent_app_number] => 11/390691 [patent_app_country] => US [patent_app_date] => 2006-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5171 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0220/20060220242.pdf [firstpage_image] =>[orig_patent_app_number] => 11390691 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/390691
Method for producing flexible printed wiring board, and flexible printed wiring board Mar 27, 2006 Abandoned
Array ( [id] => 5018808 [patent_doc_number] => 20070144773 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-06-28 [patent_title] => 'Circuit board' [patent_app_type] => utility [patent_app_number] => 11/389536 [patent_app_country] => US [patent_app_date] => 2006-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2427 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0144/20070144773.pdf [firstpage_image] =>[orig_patent_app_number] => 11389536 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/389536
Circuit board Mar 26, 2006 Abandoned
Array ( [id] => 5696998 [patent_doc_number] => 20060213682 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-28 [patent_title] => 'Flexible PCB having surplus bends for electronic equipment' [patent_app_type] => utility [patent_app_number] => 11/387352 [patent_app_country] => US [patent_app_date] => 2006-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3012 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0213/20060213682.pdf [firstpage_image] =>[orig_patent_app_number] => 11387352 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/387352
Flexible PCB having surplus bends for electronic equipment Mar 21, 2006 Abandoned
Array ( [id] => 5061566 [patent_doc_number] => 20070223205 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-27 [patent_title] => 'Shifted segment layout for differential signal traces to mitigate bundle weave effect' [patent_app_type] => utility [patent_app_number] => 11/385093 [patent_app_country] => US [patent_app_date] => 2006-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3543 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0223/20070223205.pdf [firstpage_image] =>[orig_patent_app_number] => 11385093 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/385093
Shifted segment layout for differential signal traces to mitigate bundle weave effect Mar 20, 2006 Issued
Array ( [id] => 122448 [patent_doc_number] => 07709742 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-05-04 [patent_title] => 'Superconductor cable' [patent_app_type] => utility [patent_app_number] => 11/384033 [patent_app_country] => US [patent_app_date] => 2006-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 1167 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/709/07709742.pdf [firstpage_image] =>[orig_patent_app_number] => 11384033 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/384033
Superconductor cable Mar 16, 2006 Issued
Array ( [id] => 5048560 [patent_doc_number] => 20070029104 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-08 [patent_title] => 'Superconductor cable' [patent_app_type] => utility [patent_app_number] => 11/384032 [patent_app_country] => US [patent_app_date] => 2006-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1341 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0029/20070029104.pdf [firstpage_image] =>[orig_patent_app_number] => 11384032 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/384032
Superconductor cable Mar 16, 2006 Issued
Array ( [id] => 5853985 [patent_doc_number] => 20060225918 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-12 [patent_title] => 'Electronic device substrate and its fabrication method, and electronic device and its fabrication method' [patent_app_type] => utility [patent_app_number] => 11/376556 [patent_app_country] => US [patent_app_date] => 2006-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 11268 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0225/20060225918.pdf [firstpage_image] =>[orig_patent_app_number] => 11376556 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/376556
Electronic device substrate and its fabrication method, and electronic device and its fabrication method Mar 15, 2006 Abandoned
Array ( [id] => 5256198 [patent_doc_number] => 20070209830 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-13 [patent_title] => 'Semiconductor chip package having a slot type metal film carrying a wire-bonding chip' [patent_app_type] => utility [patent_app_number] => 11/373315 [patent_app_country] => US [patent_app_date] => 2006-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2968 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0209/20070209830.pdf [firstpage_image] =>[orig_patent_app_number] => 11373315 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/373315
Semiconductor chip package having a slot type metal film carrying a wire-bonding chip Mar 12, 2006 Abandoned
Array ( [id] => 5683120 [patent_doc_number] => 20060199390 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-07 [patent_title] => 'Simultaneous and selective partitioning of via structures using plating resist' [patent_app_type] => utility [patent_app_number] => 11/369448 [patent_app_country] => US [patent_app_date] => 2006-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7453 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0199/20060199390.pdf [firstpage_image] =>[orig_patent_app_number] => 11369448 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/369448
Simultaneous and selective partitioning of via structures using plating resist Mar 5, 2006 Abandoned
Array ( [id] => 373550 [patent_doc_number] => 07473853 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-01-06 [patent_title] => 'Circuit device' [patent_app_type] => utility [patent_app_number] => 11/362516 [patent_app_country] => US [patent_app_date] => 2006-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 22 [patent_no_of_words] => 11830 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/473/07473853.pdf [firstpage_image] =>[orig_patent_app_number] => 11362516 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/362516
Circuit device Feb 26, 2006 Issued
Array ( [id] => 4810020 [patent_doc_number] => 20080190651 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-14 [patent_title] => 'Multi-Layered Printed Circuit Board Comprising Conductive Test Surfaces, and Method for Determining a Misalignment of an Inner Layer' [patent_app_type] => utility [patent_app_number] => 11/883949 [patent_app_country] => US [patent_app_date] => 2006-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5151 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0190/20080190651.pdf [firstpage_image] =>[orig_patent_app_number] => 11883949 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/883949
Multi-Layered Printed Circuit Board Comprising Conductive Test Surfaces, and Method for Determining a Misalignment of an Inner Layer Feb 22, 2006 Abandoned
Array ( [id] => 4848881 [patent_doc_number] => 20080314623 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-25 [patent_title] => 'Printed Circuit Board and Method for Manufacturing the Same' [patent_app_type] => utility [patent_app_number] => 11/884960 [patent_app_country] => US [patent_app_date] => 2006-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2698 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0314/20080314623.pdf [firstpage_image] =>[orig_patent_app_number] => 11884960 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/884960
Printed Circuit Board and Method for Manufacturing the Same Feb 22, 2006 Abandoned
Array ( [id] => 5732938 [patent_doc_number] => 20060258055 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-16 [patent_title] => 'Wiring board and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/358143 [patent_app_country] => US [patent_app_date] => 2006-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3580 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0258/20060258055.pdf [firstpage_image] =>[orig_patent_app_number] => 11358143 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/358143
Wiring board Feb 21, 2006 Issued
Array ( [id] => 5110516 [patent_doc_number] => 20070194431 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-23 [patent_title] => 'Conductive vias having two or more conductive elements for providing electrical communication between traces in different planes in a substrate, semiconductor device assemblies including such vias, and accompanying methods' [patent_app_type] => utility [patent_app_number] => 11/359863 [patent_app_country] => US [patent_app_date] => 2006-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8252 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0194/20070194431.pdf [firstpage_image] =>[orig_patent_app_number] => 11359863 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/359863
Electronic devices including conductive vias having two or more conductive elements for providing electrical communication between traces in different planes in a substrate, and accompanying methods Feb 21, 2006 Issued
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