Search

Brian Sattizahn

Examiner (ID: 8831)

Most Active Art Unit
2762
Art Unit(s)
2762
Total Applications
32
Issued Applications
31
Pending Applications
1
Abandoned Applications
0

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5652170 [patent_doc_number] => 20060137905 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-29 [patent_title] => 'Multilayer printed wiring board' [patent_app_type] => utility [patent_app_number] => 11/356350 [patent_app_country] => US [patent_app_date] => 2006-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 19223 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0137/20060137905.pdf [firstpage_image] =>[orig_patent_app_number] => 11356350 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/356350
Multilayer printed wiring board Feb 16, 2006 Issued
Array ( [id] => 5619169 [patent_doc_number] => 20060188702 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-24 [patent_title] => 'Electronic apparatus including printed circuit board' [patent_app_type] => utility [patent_app_number] => 11/354132 [patent_app_country] => US [patent_app_date] => 2006-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 8036 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0188/20060188702.pdf [firstpage_image] =>[orig_patent_app_number] => 11354132 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/354132
Electronic apparatus including printed circuit board Feb 14, 2006 Abandoned
Array ( [id] => 5705409 [patent_doc_number] => 20060194457 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-31 [patent_title] => 'Structure using soldering and soldering method' [patent_app_type] => utility [patent_app_number] => 11/350863 [patent_app_country] => US [patent_app_date] => 2006-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2484 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0194/20060194457.pdf [firstpage_image] =>[orig_patent_app_number] => 11350863 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/350863
Structure using soldering and soldering method Feb 9, 2006 Abandoned
Array ( [id] => 5069720 [patent_doc_number] => 20070190822 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-16 [patent_title] => 'Low profile compliant leads' [patent_app_type] => utility [patent_app_number] => 11/350276 [patent_app_country] => US [patent_app_date] => 2006-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5185 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0190/20070190822.pdf [firstpage_image] =>[orig_patent_app_number] => 11350276 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/350276
Low profile compliant leads Feb 8, 2006 Issued
Array ( [id] => 5669730 [patent_doc_number] => 20060175083 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-10 [patent_title] => 'Wiring board and capacitor to be built into wiring board' [patent_app_type] => utility [patent_app_number] => 11/350285 [patent_app_country] => US [patent_app_date] => 2006-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 14687 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0175/20060175083.pdf [firstpage_image] =>[orig_patent_app_number] => 11350285 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/350285
Wiring board and capacitor to be built into wiring board Feb 8, 2006 Issued
Array ( [id] => 5670715 [patent_doc_number] => 20060176069 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-10 [patent_title] => 'Wired circuit board and producing method thereof' [patent_app_type] => utility [patent_app_number] => 11/349188 [patent_app_country] => US [patent_app_date] => 2006-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6460 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0176/20060176069.pdf [firstpage_image] =>[orig_patent_app_number] => 11349188 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/349188
Wired circuit board and producing method thereof Feb 7, 2006 Issued
Array ( [id] => 5702663 [patent_doc_number] => 20060191709 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-31 [patent_title] => 'Printed circuit board, flip chip ball grid array board and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 11/349654 [patent_app_country] => US [patent_app_date] => 2006-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3563 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0191/20060191709.pdf [firstpage_image] =>[orig_patent_app_number] => 11349654 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/349654
Printed circuit board, flip chip ball grid array board and method of fabricating the same Feb 6, 2006 Abandoned
Array ( [id] => 5151519 [patent_doc_number] => 20070034401 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-15 [patent_title] => 'Circuit board and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 11/342845 [patent_app_country] => US [patent_app_date] => 2006-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 3303 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0034/20070034401.pdf [firstpage_image] =>[orig_patent_app_number] => 11342845 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/342845
Circuit board and manufacturing method thereof Jan 30, 2006 Abandoned
Array ( [id] => 82574 [patent_doc_number] => 07745736 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-29 [patent_title] => 'Interconnecting substrate and semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/341445 [patent_app_country] => US [patent_app_date] => 2006-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 10499 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/745/07745736.pdf [firstpage_image] =>[orig_patent_app_number] => 11341445 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/341445
Interconnecting substrate and semiconductor device Jan 29, 2006 Issued
Array ( [id] => 252918 [patent_doc_number] => 07579552 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-08-25 [patent_title] => 'Tab tape for tape carrier package' [patent_app_type] => utility [patent_app_number] => 11/341614 [patent_app_country] => US [patent_app_date] => 2006-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 3114 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/579/07579552.pdf [firstpage_image] =>[orig_patent_app_number] => 11341614 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/341614
Tab tape for tape carrier package Jan 29, 2006 Issued
Array ( [id] => 5134719 [patent_doc_number] => 20070076348 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-04-05 [patent_title] => 'Interposer and electronic device fabrication method' [patent_app_type] => utility [patent_app_number] => 11/339661 [patent_app_country] => US [patent_app_date] => 2006-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 12177 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0076/20070076348.pdf [firstpage_image] =>[orig_patent_app_number] => 11339661 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/339661
Interposer and electronic device fabrication method Jan 25, 2006 Issued
Array ( [id] => 92763 [patent_doc_number] => 07737367 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-15 [patent_title] => 'Multilayer circuit board and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 11/338771 [patent_app_country] => US [patent_app_date] => 2006-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 24 [patent_no_of_words] => 5347 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/737/07737367.pdf [firstpage_image] =>[orig_patent_app_number] => 11338771 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/338771
Multilayer circuit board and manufacturing method thereof Jan 24, 2006 Issued
Array ( [id] => 561971 [patent_doc_number] => 07470863 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-12-30 [patent_title] => 'Microelectronic device with mixed dielectric' [patent_app_type] => utility [patent_app_number] => 11/338402 [patent_app_country] => US [patent_app_date] => 2006-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3466 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/470/07470863.pdf [firstpage_image] =>[orig_patent_app_number] => 11338402 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/338402
Microelectronic device with mixed dielectric Jan 23, 2006 Issued
Array ( [id] => 602688 [patent_doc_number] => 07432451 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-10-07 [patent_title] => 'Electro-optical device, circuit board, mounting structure, and electronic apparatus' [patent_app_type] => utility [patent_app_number] => 11/337470 [patent_app_country] => US [patent_app_date] => 2006-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 18 [patent_no_of_words] => 9077 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/432/07432451.pdf [firstpage_image] =>[orig_patent_app_number] => 11337470 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/337470
Electro-optical device, circuit board, mounting structure, and electronic apparatus Jan 23, 2006 Issued
Array ( [id] => 857096 [patent_doc_number] => 07375289 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-05-20 [patent_title] => 'Multi-layer printed wiring board including an alignment mark as an index for a position of via holes' [patent_app_type] => utility [patent_app_number] => 11/331268 [patent_app_country] => US [patent_app_date] => 2006-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 8937 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/375/07375289.pdf [firstpage_image] =>[orig_patent_app_number] => 11331268 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/331268
Multi-layer printed wiring board including an alignment mark as an index for a position of via holes Jan 12, 2006 Issued
Array ( [id] => 5216791 [patent_doc_number] => 20070158102 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-12 [patent_title] => 'Method of attaching a high power surface mount transistor to a printed circuit board' [patent_app_type] => utility [patent_app_number] => 11/330774 [patent_app_country] => US [patent_app_date] => 2006-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3541 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0158/20070158102.pdf [firstpage_image] =>[orig_patent_app_number] => 11330774 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/330774
Method of attaching a high power surface mount transistor to a printed circuit board Jan 11, 2006 Issued
Array ( [id] => 5593355 [patent_doc_number] => 20060157271 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-20 [patent_title] => 'Double-sided flexible printed circuits' [patent_app_type] => utility [patent_app_number] => 11/330157 [patent_app_country] => US [patent_app_date] => 2006-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5494 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0157/20060157271.pdf [firstpage_image] =>[orig_patent_app_number] => 11330157 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/330157
Double-sided flexible printed circuits Jan 11, 2006 Issued
Array ( [id] => 5593354 [patent_doc_number] => 20060157270 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-20 [patent_title] => 'Printed wiring substrate and method for identifying printed wiring substrate' [patent_app_type] => utility [patent_app_number] => 11/329070 [patent_app_country] => US [patent_app_date] => 2006-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 9343 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0157/20060157270.pdf [firstpage_image] =>[orig_patent_app_number] => 11329070 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/329070
Printed wiring substrate and method for identifying printed wiring substrate Jan 10, 2006 Abandoned
Array ( [id] => 5103855 [patent_doc_number] => 20070062730 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-22 [patent_title] => 'CONTROLLED DEPTH ETCHED VIAS' [patent_app_type] => utility [patent_app_number] => 11/306730 [patent_app_country] => US [patent_app_date] => 2006-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2148 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0062/20070062730.pdf [firstpage_image] =>[orig_patent_app_number] => 11306730 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/306730
CONTROLLED DEPTH ETCHED VIAS Jan 8, 2006 Abandoned
Array ( [id] => 5691061 [patent_doc_number] => 20060151206 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-13 [patent_title] => 'Semiconductor device and manufacturing method therefor' [patent_app_type] => utility [patent_app_number] => 11/324635 [patent_app_country] => US [patent_app_date] => 2006-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7504 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0151/20060151206.pdf [firstpage_image] =>[orig_patent_app_number] => 11324635 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/324635
Semiconductor device and manufacturing method therefor Jan 3, 2006 Abandoned
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