Brian Sattizahn
Examiner (ID: 8831)
Most Active Art Unit | 2762 |
Art Unit(s) | 2762 |
Total Applications | 32 |
Issued Applications | 31 |
Pending Applications | 1 |
Abandoned Applications | 0 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 5616358
[patent_doc_number] => 20060185890
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-08-24
[patent_title] => 'AIR VOID VIA TUNING'
[patent_app_type] => utility
[patent_app_number] => 10/906466
[patent_app_country] => US
[patent_app_date] => 2005-02-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[pdf_file] => publications/A1/0185/20060185890.pdf
[firstpage_image] =>[orig_patent_app_number] => 10906466
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/906466 | AIR VOID VIA TUNING | Feb 21, 2005 | Abandoned |
Array
(
[id] => 112526
[patent_doc_number] => 07718903
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-05-18
[patent_title] => 'Component placement substrate and production method thereof'
[patent_app_type] => utility
[patent_app_number] => 11/587051
[patent_app_country] => US
[patent_app_date] => 2005-02-21
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[patent_drawing_sheets_cnt] => 15
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[pdf_file] => patents/07/718/07718903.pdf
[firstpage_image] =>[orig_patent_app_number] => 11587051
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/587051 | Component placement substrate and production method thereof | Feb 20, 2005 | Issued |
Array
(
[id] => 4964055
[patent_doc_number] => 20080106875
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-05-08
[patent_title] => 'Circuit Device And Method Of Manufacturing The Same'
[patent_app_type] => utility
[patent_app_number] => 10/588467
[patent_app_country] => US
[patent_app_date] => 2005-02-18
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[pdf_file] => publications/A1/0106/20080106875.pdf
[firstpage_image] =>[orig_patent_app_number] => 10588467
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/588467 | Circuit device and method of manufacturing the same | Feb 17, 2005 | Issued |
Array
(
[id] => 5005146
[patent_doc_number] => 20070202716
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-08-30
[patent_title] => 'Soldering Nest For A Bus Bar'
[patent_app_type] => utility
[patent_app_number] => 10/589569
[patent_app_country] => US
[patent_app_date] => 2005-02-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[pdf_file] => publications/A1/0202/20070202716.pdf
[firstpage_image] =>[orig_patent_app_number] => 10589569
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/589569 | Soldering nest for a bus bar | Feb 15, 2005 | Issued |
Array
(
[id] => 5804577
[patent_doc_number] => 20060090929
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-05-04
[patent_title] => 'Multi-layer printed circuit with low noise'
[patent_app_type] => utility
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[patent_app_country] => US
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[pdf_file] => publications/A1/0090/20060090929.pdf
[firstpage_image] =>[orig_patent_app_number] => 11055615
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/055615 | Multi-layer printed circuit with low noise | Feb 10, 2005 | Issued |
Array
(
[id] => 524819
[patent_doc_number] => 07186926
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-03-06
[patent_title] => 'Surface mounting structure for surface mounting an electronic component'
[patent_app_type] => utility
[patent_app_number] => 11/056749
[patent_app_country] => US
[patent_app_date] => 2005-02-11
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[pdf_file] => patents/07/186/07186926.pdf
[firstpage_image] =>[orig_patent_app_number] => 11056749
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/056749 | Surface mounting structure for surface mounting an electronic component | Feb 10, 2005 | Issued |
Array
(
[id] => 529150
[patent_doc_number] => 07183492
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-02-27
[patent_title] => 'Multi-layer printed circuit with low noise'
[patent_app_type] => utility
[patent_app_number] => 11/055617
[patent_app_country] => US
[patent_app_date] => 2005-02-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_no_of_words] => 1361
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[pdf_file] => patents/07/183/07183492.pdf
[firstpage_image] =>[orig_patent_app_number] => 11055617
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/055617 | Multi-layer printed circuit with low noise | Feb 10, 2005 | Issued |
Array
(
[id] => 630647
[patent_doc_number] => 07132608
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-11-07
[patent_title] => 'Electronic device having side electrode, method of manufacturing the same, and apparatus using the same'
[patent_app_type] => utility
[patent_app_number] => 11/052817
[patent_app_country] => US
[patent_app_date] => 2005-02-09
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[patent_drawing_sheets_cnt] => 18
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[patent_no_of_words] => 6707
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[pdf_file] => patents/07/132/07132608.pdf
[firstpage_image] =>[orig_patent_app_number] => 11052817
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/052817 | Electronic device having side electrode, method of manufacturing the same, and apparatus using the same | Feb 8, 2005 | Issued |
Array
(
[id] => 7592988
[patent_doc_number] => 07652213
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-01-26
[patent_title] => 'Internal conductor connection structure and multilayer substrate'
[patent_app_type] => utility
[patent_app_number] => 10/595259
[patent_app_country] => US
[patent_app_date] => 2005-02-08
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[pdf_file] => patents/07/652/07652213.pdf
[firstpage_image] =>[orig_patent_app_number] => 10595259
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/595259 | Internal conductor connection structure and multilayer substrate | Feb 7, 2005 | Issued |
Array
(
[id] => 4660379
[patent_doc_number] => 20080251286
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-10-16
[patent_title] => 'Method For Increasing a Routing Density For a Circuit Board and Such a Circuit Board'
[patent_app_type] => utility
[patent_app_number] => 10/588563
[patent_app_country] => US
[patent_app_date] => 2005-02-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[patent_no_of_words] => 3949
[patent_no_of_claims] => 24
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0251/20080251286.pdf
[firstpage_image] =>[orig_patent_app_number] => 10588563
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/588563 | Method For Increasing a Routing Density For a Circuit Board and Such a Circuit Board | Feb 2, 2005 | Abandoned |
Array
(
[id] => 7072753
[patent_doc_number] => 20050146019
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-07-07
[patent_title] => 'Wiring board, and electronic device with an electronic part mounted on a wiring board, as well as method of mounting an electronic part on a wiring board'
[patent_app_type] => utility
[patent_app_number] => 11/048861
[patent_app_country] => US
[patent_app_date] => 2005-02-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 32
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[pdf_file] => publications/A1/0146/20050146019.pdf
[firstpage_image] =>[orig_patent_app_number] => 11048861
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/048861 | Wiring board, and electronic device with an electronic part mounted on a wiring board, as well as method of mounting an electronic part on a wiring board | Feb 2, 2005 | Abandoned |
Array
(
[id] => 5831648
[patent_doc_number] => 20060243478
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-11-02
[patent_title] => 'Multilayer printed wiring board'
[patent_app_type] => utility
[patent_app_number] => 10/564856
[patent_app_country] => US
[patent_app_date] => 2005-02-03
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[pdf_file] => publications/A1/0243/20060243478.pdf
[firstpage_image] =>[orig_patent_app_number] => 10564856
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/564856 | Multilayer printed wiring board | Feb 2, 2005 | Issued |
Array
(
[id] => 9889276
[patent_doc_number] => 08975532
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-03-10
[patent_title] => 'Light-emitting diode arrangement for a high-power light-emitting diode and method for producing a light-emitting diode arrangement'
[patent_app_type] => utility
[patent_app_number] => 10/590744
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 10590744
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/590744 | Light-emitting diode arrangement for a high-power light-emitting diode and method for producing a light-emitting diode arrangement | Feb 1, 2005 | Issued |
Array
(
[id] => 613026
[patent_doc_number] => 07148425
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-12-12
[patent_title] => 'Power plane system of high-speed digital circuit for suppressing ground bounce noise'
[patent_app_type] => utility
[patent_app_number] => 11/043605
[patent_app_country] => US
[patent_app_date] => 2005-01-26
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/07/148/07148425.pdf
[firstpage_image] =>[orig_patent_app_number] => 11043605
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/043605 | Power plane system of high-speed digital circuit for suppressing ground bounce noise | Jan 25, 2005 | Issued |
Array
(
[id] => 7174732
[patent_doc_number] => 20050189140
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-09-01
[patent_title] => 'Chip package structure'
[patent_app_type] => utility
[patent_app_number] => 11/033065
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[patent_app_date] => 2005-01-10
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[pdf_file] => publications/A1/0189/20050189140.pdf
[firstpage_image] =>[orig_patent_app_number] => 11033065
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/033065 | Chip package structure | Jan 9, 2005 | Abandoned |
Array
(
[id] => 5204715
[patent_doc_number] => 20070026196
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-02-01
[patent_title] => 'Laminated electronic component and method for producing the same'
[patent_app_type] => utility
[patent_app_number] => 10/549005
[patent_app_country] => US
[patent_app_date] => 2005-01-06
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[pdf_file] => publications/A1/0026/20070026196.pdf
[firstpage_image] =>[orig_patent_app_number] => 10549005
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/549005 | Laminated electronic component and method for producing the same | Jan 5, 2005 | Issued |
Array
(
[id] => 5773524
[patent_doc_number] => 20060102700
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-05-18
[patent_title] => 'Printed circuit board having improved solder pad layout'
[patent_app_type] => utility
[patent_app_number] => 11/025161
[patent_app_country] => US
[patent_app_date] => 2004-12-29
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0102/20060102700.pdf
[firstpage_image] =>[orig_patent_app_number] => 11025161
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/025161 | Printed circuit board having improved solder pad layout | Dec 28, 2004 | Abandoned |
Array
(
[id] => 5812110
[patent_doc_number] => 20060082984
[patent_country] => US
[patent_kind] => A1
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[patent_title] => 'Cut via structure for and manufacturing method of connecting separate conductors'
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[firstpage_image] =>[orig_patent_app_number] => 11023897
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/023897 | Cut via structure for and manufacturing method of connecting separate conductors | Dec 27, 2004 | Abandoned |
Array
(
[id] => 7183372
[patent_doc_number] => 20050161781
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-07-28
[patent_title] => 'HYBRID INTEGRATED CIRCUIT DEVICE AND MANUFACTURING METHOD THEREOF'
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[firstpage_image] =>[orig_patent_app_number] => 10905245
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/905245 | HYBRID INTEGRATED CIRCUIT DEVICE AND MANUFACTURING METHOD THEREOF | Dec 21, 2004 | Abandoned |
Array
(
[id] => 5213402
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[patent_title] => 'Assembly of a component mounted on a transfer surface'
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[pdf_file] => publications/A1/0102/20070102482.pdf
[firstpage_image] =>[orig_patent_app_number] => 10582953
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/582953 | Assembly of a component mounted on a transfer surface | Dec 21, 2004 | Abandoned |