Brian Sattizahn
Examiner (ID: 8831)
Most Active Art Unit | 2762 |
Art Unit(s) | 2762 |
Total Applications | 32 |
Issued Applications | 31 |
Pending Applications | 1 |
Abandoned Applications | 0 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 6782006
[patent_doc_number] => 20030063453
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-04-03
[patent_title] => 'Multilayer wiring circuit board'
[patent_app_type] => new
[patent_app_number] => 10/254565
[patent_app_country] => US
[patent_app_date] => 2002-09-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
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[pdf_file] => publications/A1/0063/20030063453.pdf
[firstpage_image] =>[orig_patent_app_number] => 10254565
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/254565 | Multilayer wiring circuit board | Sep 25, 2002 | Issued |
Array
(
[id] => 1102345
[patent_doc_number] => 06815620
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-11-09
[patent_title] => 'Flexible circuit with electrostatic damage limiting feature'
[patent_app_type] => B2
[patent_app_number] => 10/255507
[patent_app_country] => US
[patent_app_date] => 2002-09-26
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/06/815/06815620.pdf
[firstpage_image] =>[orig_patent_app_number] => 10255507
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/255507 | Flexible circuit with electrostatic damage limiting feature | Sep 25, 2002 | Issued |
Array
(
[id] => 6742480
[patent_doc_number] => 20030019663
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-01-30
[patent_title] => 'Multi-layer wiring substrate and manufacturing method thereof'
[patent_app_type] => new
[patent_app_number] => 10/252058
[patent_app_country] => US
[patent_app_date] => 2002-09-23
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0019/20030019663.pdf
[firstpage_image] =>[orig_patent_app_number] => 10252058
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/252058 | Multi-layer wiring substrate and manufacturing method thereof | Sep 22, 2002 | Abandoned |
Array
(
[id] => 1248944
[patent_doc_number] => 06674016
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-01-06
[patent_title] => 'Electronic component'
[patent_app_type] => B2
[patent_app_number] => 10/246666
[patent_app_country] => US
[patent_app_date] => 2002-09-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
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[patent_no_of_words] => 6396
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[pdf_file] => patents/06/674/06674016.pdf
[firstpage_image] =>[orig_patent_app_number] => 10246666
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/246666 | Electronic component | Sep 18, 2002 | Issued |
Array
(
[id] => 1127797
[patent_doc_number] => 06791034
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-09-14
[patent_title] => 'Circuit board and production method therefor'
[patent_app_type] => B2
[patent_app_number] => 10/238688
[patent_app_country] => US
[patent_app_date] => 2002-09-10
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[pdf_file] => patents/06/791/06791034.pdf
[firstpage_image] =>[orig_patent_app_number] => 10238688
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/238688 | Circuit board and production method therefor | Sep 9, 2002 | Issued |
Array
(
[id] => 6863363
[patent_doc_number] => 20030188889
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-10-09
[patent_title] => 'Printed circuit board and method for producing it'
[patent_app_type] => new
[patent_app_number] => 10/235593
[patent_app_country] => US
[patent_app_date] => 2002-09-04
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[pdf_file] => publications/A1/0188/20030188889.pdf
[firstpage_image] =>[orig_patent_app_number] => 10235593
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/235593 | Printed circuit board and method for producing it | Sep 3, 2002 | Abandoned |
Array
(
[id] => 1140332
[patent_doc_number] => 06781066
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-08-24
[patent_title] => 'Packaged microelectronic component assemblies'
[patent_app_type] => B2
[patent_app_number] => 10/230616
[patent_app_country] => US
[patent_app_date] => 2002-08-29
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/06/781/06781066.pdf
[firstpage_image] =>[orig_patent_app_number] => 10230616
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/230616 | Packaged microelectronic component assemblies | Aug 28, 2002 | Issued |
Array
(
[id] => 7425466
[patent_doc_number] => 20040001325
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-01-01
[patent_title] => 'Single or multi-layer printed circuit board with recessed or extended breakaway tabs and method of manufacture thereof'
[patent_app_type] => new
[patent_app_number] => 10/227768
[patent_app_country] => US
[patent_app_date] => 2002-08-26
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[patent_drawing_sheets_cnt] => 9
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[pdf_file] => publications/A1/0001/20040001325.pdf
[firstpage_image] =>[orig_patent_app_number] => 10227768
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/227768 | Single or multi-layer printed circuit board with recessed or extended breakaway tabs and method of manufacture thereof | Aug 25, 2002 | Issued |
Array
(
[id] => 1171289
[patent_doc_number] => 06753481
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-06-22
[patent_title] => 'Printed circuit board employing lossy power distribution network to reduce power plane resonances'
[patent_app_type] => B2
[patent_app_number] => 10/227139
[patent_app_country] => US
[patent_app_date] => 2002-08-23
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/06/753/06753481.pdf
[firstpage_image] =>[orig_patent_app_number] => 10227139
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/227139 | Printed circuit board employing lossy power distribution network to reduce power plane resonances | Aug 22, 2002 | Issued |
Array
(
[id] => 6488636
[patent_doc_number] => 20020189852
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-12-19
[patent_title] => 'Fabricating method of semiconductor devices, fabricating method of printed wired boards, and printed wired board'
[patent_app_type] => new
[patent_app_number] => 10/225167
[patent_app_country] => US
[patent_app_date] => 2002-08-22
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0189/20020189852.pdf
[firstpage_image] =>[orig_patent_app_number] => 10225167
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/225167 | Fabricating method of semiconductor devices, fabricating method of printed wired boards, and printed wired board | Aug 21, 2002 | Abandoned |
Array
(
[id] => 1043940
[patent_doc_number] => 06867375
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-03-15
[patent_title] => 'Superconducting cable having a flexible former'
[patent_app_type] => utility
[patent_app_number] => 10/226177
[patent_app_country] => US
[patent_app_date] => 2002-08-22
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/06/867/06867375.pdf
[firstpage_image] =>[orig_patent_app_number] => 10226177
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/226177 | Superconducting cable having a flexible former | Aug 21, 2002 | Issued |
Array
(
[id] => 6671378
[patent_doc_number] => 20030056981
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-03-27
[patent_title] => 'Ceramic circuit board and method for manufacturing the same'
[patent_app_type] => new
[patent_app_number] => 10/223973
[patent_app_country] => US
[patent_app_date] => 2002-08-20
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[pdf_file] => publications/A1/0056/20030056981.pdf
[firstpage_image] =>[orig_patent_app_number] => 10223973
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/223973 | Ceramic circuit board and method for manufacturing the same | Aug 19, 2002 | Issued |
Array
(
[id] => 6671375
[patent_doc_number] => 20030056978
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-03-27
[patent_title] => 'Interlayer connection structure of multilayer wiring board, method of manufacturing flexible printed circuit board and method of forming land thereof'
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[patent_app_number] => 10/223396
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[firstpage_image] =>[orig_patent_app_number] => 10223396
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/223396 | Interlayer connection structure of multilayer wiring board, method of manufacturing method of forming land thereof | Aug 19, 2002 | Issued |
Array
(
[id] => 1086563
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[patent_title] => 'Integrated circuit substrate having embedded wire conductors and method therefor'
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[firstpage_image] =>[orig_patent_app_number] => 10223747
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/223747 | Integrated circuit substrate having embedded wire conductors and method therefor | Aug 18, 2002 | Issued |
Array
(
[id] => 6691669
[patent_doc_number] => 20030039101
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-02-27
[patent_title] => 'Module component, core substrate element assembly, multi-layer substrate, method of manufacturing core substrate element assembly, method of manufacturing multi-layer substrate, and method of manufacturing module component'
[patent_app_type] => new
[patent_app_number] => 10/217415
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[pdf_file] => publications/A1/0039/20030039101.pdf
[firstpage_image] =>[orig_patent_app_number] => 10217415
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/217415 | Module component, core substrate element assembly, multi-layer substrate, method of manufacturing core substrate element assembly, method of manufacturing multi-layer substrate, and method of manufacturing module component | Aug 13, 2002 | Abandoned |
Array
(
[id] => 1181530
[patent_doc_number] => 06740823
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-05-25
[patent_title] => 'Solder bonding method, and electronic device and process for fabricating the same'
[patent_app_type] => B2
[patent_app_number] => 10/216834
[patent_app_country] => US
[patent_app_date] => 2002-08-13
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[pdf_file] => patents/06/740/06740823.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/216834 | Solder bonding method, and electronic device and process for fabricating the same | Aug 12, 2002 | Issued |
Array
(
[id] => 6488599
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[patent_issue_date] => 2002-12-19
[patent_title] => 'Non-continuous conductive layer for laminated substrates'
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[patent_app_number] => 10/210219
[patent_app_country] => US
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Array
(
[id] => 6836828
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[patent_title] => 'Bump layout on silicon chip'
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Array
(
[id] => 6488727
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/202897 | Interconnection structure for interconnecting printed circuit boards | Jul 25, 2002 | Issued |
Array
(
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[patent_title] => 'Conductor strip formed with slit, cutout or grooves'
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[firstpage_image] =>[orig_patent_app_number] => 10206275
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/206275 | Conductor strip formed with slit, cutout or grooves | Jul 25, 2002 | Issued |