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Brian Sattizahn

Examiner (ID: 8831)

Most Active Art Unit
2762
Art Unit(s)
2762
Total Applications
32
Issued Applications
31
Pending Applications
1
Abandoned Applications
0

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7645364 [patent_doc_number] => 06472607 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-29 [patent_title] => 'Electronic circuit board with known flow soldering warp direction' [patent_app_type] => B1 [patent_app_number] => 09/506929 [patent_app_country] => US [patent_app_date] => 2000-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 1663 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 6 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/472/06472607.pdf [firstpage_image] =>[orig_patent_app_number] => 09506929 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/506929
Electronic circuit board with known flow soldering warp direction Feb 17, 2000 Issued
Array ( [id] => 1508972 [patent_doc_number] => 06441316 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-27 [patent_title] => 'Printed-circuit board and a semiconductor module, and a manufacturing process of the semiconductor module' [patent_app_type] => B1 [patent_app_number] => 09/504712 [patent_app_country] => US [patent_app_date] => 2000-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 3186 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/441/06441316.pdf [firstpage_image] =>[orig_patent_app_number] => 09504712 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/504712
Printed-circuit board and a semiconductor module, and a manufacturing process of the semiconductor module Feb 15, 2000 Issued
Array ( [id] => 4323718 [patent_doc_number] => 06248960 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-19 [patent_title] => 'Ceramics substrate with electronic circuit and its manufacturing method' [patent_app_type] => 1 [patent_app_number] => 9/501683 [patent_app_country] => US [patent_app_date] => 2000-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 4561 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/248/06248960.pdf [firstpage_image] =>[orig_patent_app_number] => 501683 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/501683
Ceramics substrate with electronic circuit and its manufacturing method Feb 9, 2000 Issued
Array ( [id] => 1441792 [patent_doc_number] => 06335491 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-01-01 [patent_title] => 'Interposer for semiconductor package assembly' [patent_app_type] => B1 [patent_app_number] => 09/499801 [patent_app_country] => US [patent_app_date] => 2000-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 7058 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/335/06335491.pdf [firstpage_image] =>[orig_patent_app_number] => 09499801 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/499801
Interposer for semiconductor package assembly Feb 7, 2000 Issued
Array ( [id] => 1562831 [patent_doc_number] => 06362436 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-26 [patent_title] => 'Printed wiring board for semiconductor plastic package' [patent_app_type] => B1 [patent_app_number] => 09/498482 [patent_app_country] => US [patent_app_date] => 2000-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 9852 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/362/06362436.pdf [firstpage_image] =>[orig_patent_app_number] => 09498482 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/498482
Printed wiring board for semiconductor plastic package Feb 3, 2000 Issued
Array ( [id] => 4281001 [patent_doc_number] => 06281450 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-28 [patent_title] => 'Substrate for mounting semiconductor chips' [patent_app_type] => 1 [patent_app_number] => 9/446674 [patent_app_country] => US [patent_app_date] => 1999-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 18 [patent_no_of_words] => 7444 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/281/06281450.pdf [firstpage_image] =>[orig_patent_app_number] => 446674 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/446674
Substrate for mounting semiconductor chips Dec 26, 1999 Issued
Array ( [id] => 7639924 [patent_doc_number] => 06395992 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-28 [patent_title] => 'Three-dimensional wiring board and electric insulating member for wiring board' [patent_app_type] => B1 [patent_app_number] => 09/449654 [patent_app_country] => US [patent_app_date] => 1999-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2683 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 7 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/395/06395992.pdf [firstpage_image] =>[orig_patent_app_number] => 09449654 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/449654
Three-dimensional wiring board and electric insulating member for wiring board Nov 29, 1999 Issued
Array ( [id] => 1515871 [patent_doc_number] => 06420658 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-16 [patent_title] => 'Module circuit board for semiconductor device having barriers to isolate I/O terminals from solder' [patent_app_type] => B1 [patent_app_number] => 09/450504 [patent_app_country] => US [patent_app_date] => 1999-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 12 [patent_no_of_words] => 2507 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/420/06420658.pdf [firstpage_image] =>[orig_patent_app_number] => 09450504 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/450504
Module circuit board for semiconductor device having barriers to isolate I/O terminals from solder Nov 29, 1999 Issued
09/424567 PROCESS FOR CONNECTING AN INTEGRATED CIRCUIT TO A CSP AND RESULTANT CHIP PACKAGE ASSEMBLY Nov 23, 1999 Abandoned
Array ( [id] => 1508965 [patent_doc_number] => 06441313 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-27 [patent_title] => 'Printed circuit board employing lossy power distribution network to reduce power plane resonances' [patent_app_type] => B1 [patent_app_number] => 09/447513 [patent_app_country] => US [patent_app_date] => 1999-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 28 [patent_no_of_words] => 5323 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/441/06441313.pdf [firstpage_image] =>[orig_patent_app_number] => 09447513 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/447513
Printed circuit board employing lossy power distribution network to reduce power plane resonances Nov 22, 1999 Issued
Array ( [id] => 4316704 [patent_doc_number] => 06316731 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-13 [patent_title] => 'Method of forming a printed wiring board with compensation scales' [patent_app_type] => 1 [patent_app_number] => 9/442382 [patent_app_country] => US [patent_app_date] => 1999-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 7036 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/316/06316731.pdf [firstpage_image] =>[orig_patent_app_number] => 442382 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/442382
Method of forming a printed wiring board with compensation scales Nov 16, 1999 Issued
Array ( [id] => 4340085 [patent_doc_number] => 06333471 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-12-25 [patent_title] => 'Sheet metal component for double pattern conduction and printed circuit board' [patent_app_type] => 1 [patent_app_number] => 9/441203 [patent_app_country] => US [patent_app_date] => 1999-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3584 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 253 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/333/06333471.pdf [firstpage_image] =>[orig_patent_app_number] => 441203 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/441203
Sheet metal component for double pattern conduction and printed circuit board Nov 15, 1999 Issued
09/437882 CURRENT CARRYING STRUCTURE USING VOLTAGE SWITCHABLE DIELECTRIC MATERIAL Nov 9, 1999 Abandoned
Array ( [id] => 4325371 [patent_doc_number] => 06331678 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-12-18 [patent_title] => 'Reduction of blistering and delamination of high-temperature devices with metal film' [patent_app_type] => 1 [patent_app_number] => 9/429051 [patent_app_country] => US [patent_app_date] => 1999-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 21 [patent_no_of_words] => 5863 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/331/06331678.pdf [firstpage_image] =>[orig_patent_app_number] => 429051 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/429051
Reduction of blistering and delamination of high-temperature devices with metal film Oct 28, 1999 Issued
Array ( [id] => 1587467 [patent_doc_number] => 06359233 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-19 [patent_title] => 'Printed circuit board multipack structure having internal gold fingers and multipack and printed circuit board formed therefrom, and methods of manufacture thereof' [patent_app_type] => B1 [patent_app_number] => 09/426758 [patent_app_country] => US [patent_app_date] => 1999-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 5357 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/359/06359233.pdf [firstpage_image] =>[orig_patent_app_number] => 09426758 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/426758
Printed circuit board multipack structure having internal gold fingers and multipack and printed circuit board formed therefrom, and methods of manufacture thereof Oct 25, 1999 Issued
Array ( [id] => 1524702 [patent_doc_number] => 06353189 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-05 [patent_title] => 'Wiring board, wiring board fabrication method, and semiconductor package' [patent_app_type] => B1 [patent_app_number] => 09/403223 [patent_app_country] => US [patent_app_date] => 1999-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 31 [patent_no_of_words] => 18011 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/353/06353189.pdf [firstpage_image] =>[orig_patent_app_number] => 09403223 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/403223
Wiring board, wiring board fabrication method, and semiconductor package Oct 14, 1999 Issued
Array ( [id] => 4375165 [patent_doc_number] => 06288343 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-11 [patent_title] => 'Printed circuit board' [patent_app_type] => 1 [patent_app_number] => 9/414818 [patent_app_country] => US [patent_app_date] => 1999-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2296 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 290 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/288/06288343.pdf [firstpage_image] =>[orig_patent_app_number] => 414818 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/414818
Printed circuit board Oct 7, 1999 Issued
Array ( [id] => 4386212 [patent_doc_number] => 06294743 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-25 [patent_title] => 'Multilayer print circuit board and the production method of the multilayer print circuit board' [patent_app_type] => 1 [patent_app_number] => 9/413147 [patent_app_country] => US [patent_app_date] => 1999-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 5664 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/294/06294743.pdf [firstpage_image] =>[orig_patent_app_number] => 413147 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/413147
Multilayer print circuit board and the production method of the multilayer print circuit board Oct 5, 1999 Issued
Array ( [id] => 4386245 [patent_doc_number] => 06294744 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-25 [patent_title] => 'Multilayer print circuit board and the production method of the multilayer print circuit board' [patent_app_type] => 1 [patent_app_number] => 9/413146 [patent_app_country] => US [patent_app_date] => 1999-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 5660 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/294/06294744.pdf [firstpage_image] =>[orig_patent_app_number] => 413146 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/413146
Multilayer print circuit board and the production method of the multilayer print circuit board Oct 5, 1999 Issued
Array ( [id] => 4413239 [patent_doc_number] => 06229095 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-08 [patent_title] => 'Multilayer wiring board' [patent_app_type] => 1 [patent_app_number] => 9/408268 [patent_app_country] => US [patent_app_date] => 1999-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6200 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/229/06229095.pdf [firstpage_image] =>[orig_patent_app_number] => 408268 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/408268
Multilayer wiring board Sep 28, 1999 Issued
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