Brian Sattizahn

Array ( [id] => 4413275 [patent_doc_number] => 06265672 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-24 [patent_title] => 'Multiple layer module structure for printed circuit board' [patent_app_type] => 1 [patent_app_number] => 9/274290 [patent_app_country] => US [patent_app_date] => 1999-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2188 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/265/06265672.pdf [firstpage_image] =>[orig_patent_app_number] => 274290 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4364778 [patent_doc_number] => 06255602 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-03 [patent_title] => 'Multiple layer electrical interface' [patent_app_type] => 1 [patent_app_number] => 9/270472 [patent_app_country] => US [patent_app_date] => 1999-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 17 [patent_no_of_words] => 4384 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/255/06255602.pdf [firstpage_image] =>[orig_patent_app_number] => 270472 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4424200 [patent_doc_number] => 06225571 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-01 [patent_title] => 'Heatsink with high thermal conductivity dielectric' [patent_app_type] => 1 [patent_app_number] => 9/252741 [patent_app_country] => US [patent_app_date] => 1999-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3433 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/225/06225571.pdf [firstpage_image] =>[orig_patent_app_number] => 252741 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4357714 [patent_doc_number] => 06291777 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-18 [patent_title] => 'Conductive feed-through for creating a surface electrode connection within a dielectric body and method of fabricating same' [patent_app_type] => 1 [patent_app_number] => 9/251691 [patent_app_country] => US [patent_app_date] => 1999-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 2848 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/291/06291777.pdf [firstpage_image] =>[orig_patent_app_number] => 251691 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4409790 [patent_doc_number] => 06271483 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-07 [patent_title] => 'Wiring board having vias' [patent_app_type] => 1 [patent_app_number] => 9/202432 [patent_app_country] => US [patent_app_date] => 1998-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 17 [patent_no_of_words] => 3693 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/271/06271483.pdf [firstpage_image] =>[orig_patent_app_number] => 202432 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4275756 [patent_doc_number] => 06246010 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-12 [patent_title] => 'High density electronic package' [patent_app_type] => 1 [patent_app_number] => 9/199693 [patent_app_country] => US [patent_app_date] => 1998-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 3831 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/246/06246010.pdf [firstpage_image] =>[orig_patent_app_number] => 199693 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7963975 [patent_doc_number] => 06680440 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-01-20 [patent_title] => 'Circuitized structures produced by the methods of electroless plating' [patent_app_type] => B1 [patent_app_number] => 09/027856 [patent_app_country] => US [patent_app_date] => 1998-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 4041 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/680/06680440.pdf [firstpage_image] =>[orig_patent_app_number] => 09027856 [rel_patent_id] =>[rel_patent_doc_number] =>)