Search

Brian Turner

Examiner (ID: 15461)

Most Active Art Unit
2894
Art Unit(s)
2894, 2818
Total Applications
866
Issued Applications
635
Pending Applications
118
Abandoned Applications
131

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18219465 [patent_doc_number] => 11594414 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-28 [patent_title] => Method for manufacturing a single-grained semiconductor nanowire [patent_app_type] => utility [patent_app_number] => 17/490673 [patent_app_country] => US [patent_app_date] => 2021-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 5821 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17490673 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/490673
Method for manufacturing a single-grained semiconductor nanowire Sep 29, 2021 Issued
Array ( [id] => 18729333 [patent_doc_number] => 20230343629 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-26 [patent_title] => LAMINATE AND RELEASE AGENT COMPOSITION [patent_app_type] => utility [patent_app_number] => 18/023184 [patent_app_country] => US [patent_app_date] => 2021-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12684 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18023184 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/023184
LAMINATE AND RELEASE AGENT COMPOSITION Aug 19, 2021 Pending
Array ( [id] => 18578924 [patent_doc_number] => 11735464 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-08-22 [patent_title] => Method of demounting thin semiconductor devices [patent_app_type] => utility [patent_app_number] => 17/407760 [patent_app_country] => US [patent_app_date] => 2021-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 18 [patent_no_of_words] => 3460 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17407760 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/407760
Method of demounting thin semiconductor devices Aug 19, 2021 Issued
Array ( [id] => 17448189 [patent_doc_number] => 20220068694 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-03 [patent_title] => WAFER PROCESSING METHOD [patent_app_type] => utility [patent_app_number] => 17/406231 [patent_app_country] => US [patent_app_date] => 2021-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9482 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17406231 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/406231
WAFER PROCESSING METHOD Aug 18, 2021 Abandoned
Array ( [id] => 17262712 [patent_doc_number] => 20210375697 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-02 [patent_title] => Structure and Formation Method of Semiconductor Device with Fin Structures [patent_app_type] => utility [patent_app_number] => 17/404443 [patent_app_country] => US [patent_app_date] => 2021-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8736 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17404443 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/404443
Structure and formation method of semiconductor device with fin structures Aug 16, 2021 Issued
Array ( [id] => 17247316 [patent_doc_number] => 20210367061 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-25 [patent_title] => METHODS OF FABRICATING SEMICONDUCTOR STRUCTURES WITH TWO-STEP ETCHING [patent_app_type] => utility [patent_app_number] => 17/395542 [patent_app_country] => US [patent_app_date] => 2021-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5219 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17395542 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/395542
Methods of fabricating semiconductor structures with two-step etching Aug 5, 2021 Issued
Array ( [id] => 18827636 [patent_doc_number] => 11842926 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-12 [patent_title] => Method of processing a substrate [patent_app_type] => utility [patent_app_number] => 17/393843 [patent_app_country] => US [patent_app_date] => 2021-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 17 [patent_no_of_words] => 17534 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17393843 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/393843
Method of processing a substrate Aug 3, 2021 Issued
Array ( [id] => 18177682 [patent_doc_number] => 20230038411 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-09 [patent_title] => SEMICONDUCTOR PACKAGE WITH RAISED DAM ON CLIP OR LEADFRAME [patent_app_type] => utility [patent_app_number] => 17/392738 [patent_app_country] => US [patent_app_date] => 2021-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4522 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17392738 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/392738
SEMICONDUCTOR PACKAGE WITH RAISED DAM ON CLIP OR LEADFRAME Aug 2, 2021 Pending
Array ( [id] => 19444602 [patent_doc_number] => 12094893 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-17 [patent_title] => Capacitor including first electrode, dielectric layer, and second electrode, image sensor, and method for producing capacitor [patent_app_type] => utility [patent_app_number] => 17/391793 [patent_app_country] => US [patent_app_date] => 2021-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 5841 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17391793 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/391793
Capacitor including first electrode, dielectric layer, and second electrode, image sensor, and method for producing capacitor Aug 1, 2021 Issued
Array ( [id] => 17389295 [patent_doc_number] => 20220037147 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-03 [patent_title] => INTEGRATED FLOWABLE LOW-K GAP-FILL AND PLASMA TREATMENT [patent_app_type] => utility [patent_app_number] => 17/386724 [patent_app_country] => US [patent_app_date] => 2021-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8973 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -35 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17386724 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/386724
Integrated flowable low-k gap-fill and plasma treatment Jul 27, 2021 Issued
Array ( [id] => 17217682 [patent_doc_number] => 20210351020 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-11 [patent_title] => Remote Capacitively Coupled Plasma Source with Improved Ion Blocker [patent_app_type] => utility [patent_app_number] => 17/381162 [patent_app_country] => US [patent_app_date] => 2021-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4396 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17381162 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/381162
Remote Capacitively Coupled Plasma Source with Improved Ion Blocker Jul 19, 2021 Abandoned
Array ( [id] => 17359900 [patent_doc_number] => 20220020696 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-20 [patent_title] => WORKPIECE MANAGEMENT METHOD AND SHEET CUTTING MACHINE [patent_app_type] => utility [patent_app_number] => 17/379518 [patent_app_country] => US [patent_app_date] => 2021-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7806 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -2 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17379518 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/379518
WORKPIECE MANAGEMENT METHOD AND SHEET CUTTING MACHINE Jul 18, 2021 Abandoned
Array ( [id] => 18670061 [patent_doc_number] => 11776973 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-03 [patent_title] => Method of manufacturing display device [patent_app_type] => utility [patent_app_number] => 17/379917 [patent_app_country] => US [patent_app_date] => 2021-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8982 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17379917 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/379917
Method of manufacturing display device Jul 18, 2021 Issued
Array ( [id] => 17203814 [patent_doc_number] => 20210343909 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-04 [patent_title] => BARRIER FREE STABLE QUANTUM DOT FILM [patent_app_type] => utility [patent_app_number] => 17/377457 [patent_app_country] => US [patent_app_date] => 2021-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5881 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17377457 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/377457
BARRIER FREE STABLE QUANTUM DOT FILM Jul 15, 2021 Abandoned
Array ( [id] => 17203639 [patent_doc_number] => 20210343734 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-04 [patent_title] => METHOD FOR IMPROVING CONTROL GATE UNIFORMITY DURING MANUFACTURE OF PROCESSORS WITH EMBEDDED FLASH MEMORY [patent_app_type] => utility [patent_app_number] => 17/374591 [patent_app_country] => US [patent_app_date] => 2021-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5741 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17374591 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/374591
METHOD FOR IMPROVING CONTROL GATE UNIFORMITY DURING MANUFACTURE OF PROCESSORS WITH EMBEDDED FLASH MEMORY Jul 12, 2021 Pending
Array ( [id] => 17203638 [patent_doc_number] => 20210343733 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-04 [patent_title] => METHOD FOR IMPROVING CONTROL GATE UNIFORMITY DURING MANUFACTURE OF PROCESSORS WITH EMBEDDED FLASH MEMORY [patent_app_type] => utility [patent_app_number] => 17/374573 [patent_app_country] => US [patent_app_date] => 2021-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5741 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17374573 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/374573
Method for improving control gate uniformity during manufacture of processors with embedded flash memory Jul 12, 2021 Issued
Array ( [id] => 19046804 [patent_doc_number] => 11935924 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-19 [patent_title] => Semiconductor device and method of fabricating the same [patent_app_type] => utility [patent_app_number] => 17/371582 [patent_app_country] => US [patent_app_date] => 2021-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 47 [patent_figures_cnt] => 49 [patent_no_of_words] => 12907 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17371582 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/371582
Semiconductor device and method of fabricating the same Jul 8, 2021 Issued
Array ( [id] => 18653084 [patent_doc_number] => 20230298924 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-21 [patent_title] => PROTECTIVE FILM AND BACK GRINDING METHOD FOR SEMICONDUCTOR WAFER [patent_app_type] => utility [patent_app_number] => 18/000419 [patent_app_country] => US [patent_app_date] => 2021-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8241 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18000419 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/000419
PROTECTIVE FILM AND BACK GRINDING METHOD FOR SEMICONDUCTOR WAFER Jul 6, 2021 Pending
Array ( [id] => 18068146 [patent_doc_number] => 20220399234 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-15 [patent_title] => SEMICONDUCTOR DIE SINGULATION [patent_app_type] => utility [patent_app_number] => 17/347843 [patent_app_country] => US [patent_app_date] => 2021-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3160 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17347843 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/347843
SEMICONDUCTOR DIE SINGULATION Jun 14, 2021 Abandoned
Array ( [id] => 17417002 [patent_doc_number] => 20220051906 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-17 [patent_title] => Nitride-Containing STI Liner for SiGe Channel [patent_app_type] => utility [patent_app_number] => 17/339007 [patent_app_country] => US [patent_app_date] => 2021-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8630 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17339007 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/339007
Nitride-containing STI liner for SiGe channel Jun 3, 2021 Issued
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