Search

Brian Turner

Examiner (ID: 2043, Phone: (571)270-5411 , Office: P/2894 )

Most Active Art Unit
2894
Art Unit(s)
2894, 2818
Total Applications
877
Issued Applications
648
Pending Applications
113
Abandoned Applications
131

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16715617 [patent_doc_number] => 20210082764 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-18 [patent_title] => METHOD OF PROCESSING WORKPIECE [patent_app_type] => utility [patent_app_number] => 17/017312 [patent_app_country] => US [patent_app_date] => 2020-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8536 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17017312 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/017312
Method of processing workpiece Sep 9, 2020 Issued
Array ( [id] => 19079607 [patent_doc_number] => 11948987 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-02 [patent_title] => Self-aligned backside source contact structure [patent_app_type] => utility [patent_app_number] => 17/016109 [patent_app_country] => US [patent_app_date] => 2020-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 25 [patent_no_of_words] => 9917 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17016109 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/016109
Self-aligned backside source contact structure Sep 8, 2020 Issued
Array ( [id] => 17448424 [patent_doc_number] => 20220068929 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-03 [patent_title] => METAL INSULATOR SEMICONDUCTOR (MIS) CONTACT IN THREE DIMENSIONAL (3D) VERTICAL MEMORY [patent_app_type] => utility [patent_app_number] => 17/007327 [patent_app_country] => US [patent_app_date] => 2020-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19617 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17007327 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/007327
Metal insulator semiconductor (MIS) contact in three dimensional (3D) vertical memory Aug 30, 2020 Issued
Array ( [id] => 17559099 [patent_doc_number] => 11315821 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-26 [patent_title] => Processing method for wafer [patent_app_type] => utility [patent_app_number] => 17/004441 [patent_app_country] => US [patent_app_date] => 2020-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 6640 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 422 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17004441 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/004441
Processing method for wafer Aug 26, 2020 Issued
Array ( [id] => 17448135 [patent_doc_number] => 20220068640 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-03 [patent_title] => DIFFUSION BARRIERS FOR GERMANIUM [patent_app_type] => utility [patent_app_number] => 17/004262 [patent_app_country] => US [patent_app_date] => 2020-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9565 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17004262 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/004262
Diffusion barriers for germanium Aug 26, 2020 Issued
Array ( [id] => 17803425 [patent_doc_number] => 11417738 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-16 [patent_title] => Semiconductor structure and fabrication method thereof [patent_app_type] => utility [patent_app_number] => 17/004937 [patent_app_country] => US [patent_app_date] => 2020-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 5607 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17004937 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/004937
Semiconductor structure and fabrication method thereof Aug 26, 2020 Issued
Array ( [id] => 20276626 [patent_doc_number] => 12446415 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-14 [patent_title] => Display panel and display device [patent_app_type] => utility [patent_app_number] => 17/051980 [patent_app_country] => US [patent_app_date] => 2020-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 0 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 247 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17051980 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/051980
Display panel and display device Aug 23, 2020 Issued
Array ( [id] => 16488010 [patent_doc_number] => 20200381619 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-03 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/998542 [patent_app_country] => US [patent_app_date] => 2020-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9595 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 252 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16998542 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/998542
SEMICONDUCTOR DEVICE Aug 19, 2020 Abandoned
Array ( [id] => 17270540 [patent_doc_number] => 11195971 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-07 [patent_title] => Glass wiring substrate, method of producing the same, part-mounted glass wiring substrate, method of producing the same, and display apparatus substrate [patent_app_type] => utility [patent_app_number] => 16/996306 [patent_app_country] => US [patent_app_date] => 2020-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 19 [patent_no_of_words] => 11722 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 295 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16996306 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/996306
Glass wiring substrate, method of producing the same, part-mounted glass wiring substrate, method of producing the same, and display apparatus substrate Aug 17, 2020 Issued
Array ( [id] => 17431969 [patent_doc_number] => 20220059678 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-24 [patent_title] => SEMICONDUCTOR DEVICES WITH FIN-TOP HARD MASK AND METHODS FOR FABRICATION THEREOF [patent_app_type] => utility [patent_app_number] => 16/996781 [patent_app_country] => US [patent_app_date] => 2020-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8886 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16996781 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/996781
Semiconductor devices with fin-top hard mask and methods for fabrication thereof Aug 17, 2020 Issued
Array ( [id] => 17070629 [patent_doc_number] => 20210272846 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-02 [patent_title] => DISPOSING PROTECTIVE COVER FILM AND UNDERFILL LAYER OVER SINGULATED INTEGRATED CIRCUIT DICE FOR PROTECTION DURING INTEGRATED CIRCUIT PROCESSING [patent_app_type] => utility [patent_app_number] => 16/994941 [patent_app_country] => US [patent_app_date] => 2020-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13114 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16994941 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/994941
Disposing protective cover film and underfill layer over singulated integrated circuit dice for protection during integrated circuit processing Aug 16, 2020 Issued
Array ( [id] => 16995644 [patent_doc_number] => 20210234064 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-29 [patent_title] => LASER DIODES, LEDS, AND SILICON INTEGRATED SENSORS ON PATTERNED SUBSTRATES [patent_app_type] => utility [patent_app_number] => 16/947726 [patent_app_country] => US [patent_app_date] => 2020-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3820 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16947726 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/947726
LASER DIODES, LEDS, AND SILICON INTEGRATED SENSORS ON PATTERNED SUBSTRATES Aug 12, 2020 Abandoned
Array ( [id] => 16796317 [patent_doc_number] => 20210126134 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-29 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING [patent_app_type] => utility [patent_app_number] => 16/945224 [patent_app_country] => US [patent_app_date] => 2020-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11491 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16945224 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/945224
Semiconductor device and method of manufacturing Jul 30, 2020 Issued
Array ( [id] => 17389488 [patent_doc_number] => 20220037340 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-03 [patent_title] => Connection Between Source/Drain And Gate [patent_app_type] => utility [patent_app_number] => 16/945146 [patent_app_country] => US [patent_app_date] => 2020-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9366 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16945146 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/945146
Connection between source/drain and gate Jul 30, 2020 Issued
Array ( [id] => 16624861 [patent_doc_number] => 20210043514 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-11 [patent_title] => WAFER PROCESSING METHOD [patent_app_type] => utility [patent_app_number] => 16/944382 [patent_app_country] => US [patent_app_date] => 2020-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8381 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 265 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16944382 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/944382
Wafer processing method Jul 30, 2020 Issued
Array ( [id] => 16440342 [patent_doc_number] => 20200357669 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-12 [patent_title] => PROCESSING TOOL HAVING A MONITORING DEVICE [patent_app_type] => utility [patent_app_number] => 16/941405 [patent_app_country] => US [patent_app_date] => 2020-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12706 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16941405 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/941405
Processing tool having a monitoring device Jul 27, 2020 Issued
Array ( [id] => 16645496 [patent_doc_number] => 10923362 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-16 [patent_title] => Manufacturing process of element chip [patent_app_type] => utility [patent_app_number] => 16/939492 [patent_app_country] => US [patent_app_date] => 2020-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 8687 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16939492 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/939492
Manufacturing process of element chip Jul 26, 2020 Issued
Array ( [id] => 16617193 [patent_doc_number] => 20210035846 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-04 [patent_title] => METHOD OF PROCESSING A SUBSTRATE [patent_app_type] => utility [patent_app_number] => 16/939987 [patent_app_country] => US [patent_app_date] => 2020-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21188 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16939987 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/939987
Method of processing a substrate Jul 26, 2020 Issued
Array ( [id] => 18137213 [patent_doc_number] => 11562902 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-24 [patent_title] => Hydrogen management in plasma deposited films [patent_app_type] => utility [patent_app_number] => 16/932793 [patent_app_country] => US [patent_app_date] => 2020-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5592 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16932793 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/932793
Hydrogen management in plasma deposited films Jul 18, 2020 Issued
Array ( [id] => 16796021 [patent_doc_number] => 20210125838 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-29 [patent_title] => SEMICONDUCTOR DEVICE MANUFACTURING METHOD [patent_app_type] => utility [patent_app_number] => 16/931678 [patent_app_country] => US [patent_app_date] => 2020-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4676 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 23 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16931678 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/931678
Semiconductor device manufacturing method Jul 16, 2020 Issued
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