Search

Brian Turner

Examiner (ID: 2043, Phone: (571)270-5411 , Office: P/2894 )

Most Active Art Unit
2894
Art Unit(s)
2894, 2818
Total Applications
877
Issued Applications
648
Pending Applications
113
Abandoned Applications
131

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19252855 [patent_doc_number] => 20240203852 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-20 [patent_title] => POWER APPARATUS [patent_app_type] => utility [patent_app_number] => 18/377765 [patent_app_country] => US [patent_app_date] => 2023-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3867 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18377765 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/377765
POWER APPARATUS Oct 5, 2023 Pending
Array ( [id] => 19116414 [patent_doc_number] => 20240128164 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-18 [patent_title] => INTEGRATED CIRCUIT INCLUDING THROUGH-SILICON VIA AND METHOD OF DESIGNING THE INTEGRATED CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/475290 [patent_app_country] => US [patent_app_date] => 2023-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10381 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18475290 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/475290
INTEGRATED CIRCUIT INCLUDING THROUGH-SILICON VIA AND METHOD OF DESIGNING THE INTEGRATED CIRCUIT Sep 26, 2023 Pending
Array ( [id] => 19086143 [patent_doc_number] => 20240112944 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-04 [patent_title] => Process for Wafer Bonding [patent_app_type] => utility [patent_app_number] => 18/474803 [patent_app_country] => US [patent_app_date] => 2023-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6504 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18474803 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/474803
Process for Wafer Bonding Sep 25, 2023 Pending
Array ( [id] => 19086103 [patent_doc_number] => 20240112904 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-04 [patent_title] => PLASMA PROCESS UNIFORMITY BY WAFER BACK SIDE DOPING [patent_app_type] => utility [patent_app_number] => 18/370452 [patent_app_country] => US [patent_app_date] => 2023-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4666 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18370452 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/370452
PLASMA PROCESS UNIFORMITY BY WAFER BACK SIDE DOPING Sep 19, 2023 Pending
Array ( [id] => 18882854 [patent_doc_number] => 20240006223 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-04 [patent_title] => METHOD FOR SEMICONDUCTOR DIE EDGE PROTECTION AND SEMICONDUCTOR DIE SEPARATION [patent_app_type] => utility [patent_app_number] => 18/368449 [patent_app_country] => US [patent_app_date] => 2023-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6096 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18368449 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/368449
METHOD FOR SEMICONDUCTOR DIE EDGE PROTECTION AND SEMICONDUCTOR DIE SEPARATION Sep 13, 2023 Pending
Array ( [id] => 19835733 [patent_doc_number] => 20250087519 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-13 [patent_title] => BACK GRINDING TAPE HAVING TABS TO ASSIST IN REMOVING THE BACK GRINDING TAPE FROM A WAFER [patent_app_type] => utility [patent_app_number] => 18/464779 [patent_app_country] => US [patent_app_date] => 2023-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4999 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18464779 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/464779
BACK GRINDING TAPE HAVING TABS TO ASSIST IN REMOVING THE BACK GRINDING TAPE FROM A WAFER Sep 10, 2023 Pending
Array ( [id] => 19054921 [patent_doc_number] => 20240096890 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-21 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/460273 [patent_app_country] => US [patent_app_date] => 2023-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9857 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18460273 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/460273
Semiconductor device Aug 31, 2023 Issued
Array ( [id] => 18848854 [patent_doc_number] => 20230411258 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => SEMICONDUCTOR DEVICE AND CORRESPONDING METHOD [patent_app_type] => utility [patent_app_number] => 18/241414 [patent_app_country] => US [patent_app_date] => 2023-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2918 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18241414 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/241414
SEMICONDUCTOR DEVICE AND CORRESPONDING METHOD Aug 31, 2023 Abandoned
Array ( [id] => 19589609 [patent_doc_number] => 20240387166 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-21 [patent_title] => SEMICONDUCTOR DEVICE WITH POROUS LAYER AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/240475 [patent_app_country] => US [patent_app_date] => 2023-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11308 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18240475 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/240475
SEMICONDUCTOR DEVICE WITH POROUS LAYER AND METHOD FOR FABRICATING THE SAME Aug 30, 2023 Pending
Array ( [id] => 19775426 [patent_doc_number] => 20250056852 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-13 [patent_title] => SOURCE/DRAIN REGIONS IN COMPLEMENTARY FIELD EFFECT TRANSISTORS AND METHODS OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/447913 [patent_app_country] => US [patent_app_date] => 2023-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14253 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18447913 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/447913
SOURCE/DRAIN REGIONS IN COMPLEMENTARY FIELD EFFECT TRANSISTORS AND METHODS OF FORMING THE SAME Aug 9, 2023 Pending
Array ( [id] => 18812522 [patent_doc_number] => 20230386859 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-30 [patent_title] => NITRIDE-CONTAINING STI LINER FOR SIGE CHANNEL [patent_app_type] => utility [patent_app_number] => 18/446652 [patent_app_country] => US [patent_app_date] => 2023-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8667 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18446652 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/446652
Nitride-containing STI liner for SIGE channel Aug 8, 2023 Issued
Array ( [id] => 19546359 [patent_doc_number] => 20240363395 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-31 [patent_title] => METHOD FOR FORMING A SEMICONDUCTOR DEVICE AND DEVICES FABRICATED THEREOF [patent_app_type] => utility [patent_app_number] => 18/231320 [patent_app_country] => US [patent_app_date] => 2023-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10620 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18231320 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/231320
METHOD FOR FORMING A SEMICONDUCTOR DEVICE AND DEVICES FABRICATED THEREOF Aug 7, 2023 Pending
Array ( [id] => 20441472 [patent_doc_number] => 12512314 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-30 [patent_title] => Processing method of wafer [patent_app_type] => utility [patent_app_number] => 18/366881 [patent_app_country] => US [patent_app_date] => 2023-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 4823 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18366881 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/366881
Processing method of wafer Aug 7, 2023 Issued
Array ( [id] => 18789344 [patent_doc_number] => 20230378001 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-23 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD [patent_app_type] => utility [patent_app_number] => 18/365654 [patent_app_country] => US [patent_app_date] => 2023-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12812 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18365654 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/365654
Semiconductor device and method Aug 3, 2023 Issued
Array ( [id] => 18789332 [patent_doc_number] => 20230377988 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-23 [patent_title] => Different Source/Drain Profiles for N-type FinFETs and P-type FinFETs [patent_app_type] => utility [patent_app_number] => 18/363350 [patent_app_country] => US [patent_app_date] => 2023-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7635 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18363350 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/363350
Different Source/Drain Profiles for N-type FinFETs and P-type FinFETs Jul 31, 2023 Pending
Array ( [id] => 18774632 [patent_doc_number] => 20230369463 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-16 [patent_title] => SEMICONDUCTOR DEVICES WITH FIN-TOP HARD MASK AND METHODS FOR FABRICATION THEREOF [patent_app_type] => utility [patent_app_number] => 18/226896 [patent_app_country] => US [patent_app_date] => 2023-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8916 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18226896 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/226896
Semiconductor devices with fin-top hard mask and methods for fabrication thereof Jul 26, 2023 Issued
Array ( [id] => 18774293 [patent_doc_number] => 20230369124 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-16 [patent_title] => Nanostructure Field-Effect Transistor Device and Method of Forming [patent_app_type] => utility [patent_app_number] => 18/357449 [patent_app_country] => US [patent_app_date] => 2023-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12878 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18357449 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/357449
Nanostructure field-effect transistor device and method of forming Jul 23, 2023 Issued
Array ( [id] => 19023071 [patent_doc_number] => 20240079242 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-07 [patent_title] => SEMICONDUCTOR APPARATUS AND MANUFACTURING METHOD OF SEMICONDUCTOR APPARATUS [patent_app_type] => utility [patent_app_number] => 18/356230 [patent_app_country] => US [patent_app_date] => 2023-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5571 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18356230 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/356230
SEMICONDUCTOR APPARATUS AND MANUFACTURING METHOD OF SEMICONDUCTOR APPARATUS Jul 20, 2023 Pending
Array ( [id] => 19634783 [patent_doc_number] => 20240413232 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-12 [patent_title] => HIGH PERFORMANCE FETS [patent_app_type] => utility [patent_app_number] => 18/356776 [patent_app_country] => US [patent_app_date] => 2023-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7666 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18356776 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/356776
HIGH PERFORMANCE FETS Jul 20, 2023 Pending
Array ( [id] => 19634657 [patent_doc_number] => 20240413106 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-12 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/350755 [patent_app_country] => US [patent_app_date] => 2023-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4109 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 27 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18350755 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/350755
SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME Jul 11, 2023 Pending
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