Brian Turner

Array ( [id] => 11599811 [patent_doc_number] => 09646990 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-09 [patent_title] => 'NAND memory strings and methods of fabrication thereof' [patent_app_type] => utility [patent_app_number] => 15/179318 [patent_app_country] => US [patent_app_date] => 2016-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 27 [patent_no_of_words] => 9453 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 302 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15179318 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11087841 [patent_doc_number] => 20160284809 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-29 [patent_title] => 'METHOD FOR MANUFACTURING THIN FILM TRANSISTOR, AND THIN FILM TRANSISTOR THEREOF' [patent_app_type] => utility [patent_app_number] => 15/176388 [patent_app_country] => US [patent_app_date] => 2016-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4073 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15176388 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12147728 [patent_doc_number] => 09881990 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-01-30 [patent_title] => 'Integrated inductor for integrated circuit devices' [patent_app_type] => utility [patent_app_number] => 15/169665 [patent_app_country] => US [patent_app_date] => 2016-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 26 [patent_no_of_words] => 6916 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15169665 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12229737 [patent_doc_number] => 09916985 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-03-13 [patent_title] => 'Indium phosphide smoothing and chemical mechanical planarization processes' [patent_app_type] => utility [patent_app_number] => 15/160118 [patent_app_country] => US [patent_app_date] => 2016-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 25 [patent_no_of_words] => 11430 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15160118 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11293910 [patent_doc_number] => 20160343842 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-24 [patent_title] => 'METHOD OF GROWING AN EPITAXIAL SUBSTRATE AND FORMING A SEMICONDUCTOR DEVICE ON THE EPITAXIAL SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 15/160060 [patent_app_country] => US [patent_app_date] => 2016-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4061 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15160060 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11898131 [patent_doc_number] => 09768070 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-09-19 [patent_title] => 'Method for manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 15/160007 [patent_app_country] => US [patent_app_date] => 2016-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 8921 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15160007 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11446288 [patent_doc_number] => 20170047309 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-02-16 [patent_title] => 'FABRICATING METHOD OF SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 15/158921 [patent_app_country] => US [patent_app_date] => 2016-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 10167 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15158921 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12147912 [patent_doc_number] => 09882174 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-01-30 [patent_title] => 'Repairing method, repairing device and manufacturing method of array substrate' [patent_app_type] => utility [patent_app_number] => 15/159218 [patent_app_country] => US [patent_app_date] => 2016-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 5622 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 322 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15159218 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11746741 [patent_doc_number] => 20170200814 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-07-13 [patent_title] => 'MANUFACTURING METHOD OF METAL OXIDE SEMICONDUCTOR THIN FILM TRANSISTOR' [patent_app_type] => utility [patent_app_number] => 15/158595 [patent_app_country] => US [patent_app_date] => 2016-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 4191 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15158595 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11898079 [patent_doc_number] => 09768019 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-09-19 [patent_title] => 'Laser crystallization method' [patent_app_type] => utility [patent_app_number] => 15/158755 [patent_app_country] => US [patent_app_date] => 2016-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 3918 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15158755 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11932556 [patent_doc_number] => 09799559 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-10-24 [patent_title] => 'Methods employing sacrificial barrier layer for protection of vias during trench formation' [patent_app_type] => utility [patent_app_number] => 15/158827 [patent_app_country] => US [patent_app_date] => 2016-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 3308 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15158827 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11291860 [patent_doc_number] => 20160341792 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-24 [patent_title] => 'Multi-Oscillator, Continuous Cody-Lorentz Model Of Optical Dispersion' [patent_app_type] => utility [patent_app_number] => 15/158883 [patent_app_country] => US [patent_app_date] => 2016-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 8131 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15158883 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11386009 [patent_doc_number] => 20170012065 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-01-12 [patent_title] => 'ARRAY SUBSTRATE, A METHOD FOR MANUFACTURING THE SAME, AND DISPLAY DEVICE' [patent_app_type] => utility [patent_app_number] => 15/159415 [patent_app_country] => US [patent_app_date] => 2016-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2937 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15159415 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12061840 [patent_doc_number] => 20170338184 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-23 [patent_title] => 'METHOD OF DICING INTEGRATED CIRCUIT WAFERS' [patent_app_type] => utility [patent_app_number] => 15/159046 [patent_app_country] => US [patent_app_date] => 2016-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2031 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15159046 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11544753 [patent_doc_number] => 20170098578 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-04-06 [patent_title] => 'METHOD OF FABRICATING A SEMICONDUCTOR PACKAGE' [patent_app_type] => utility [patent_app_number] => 15/158890 [patent_app_country] => US [patent_app_date] => 2016-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5316 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15158890 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12740065 [patent_doc_number] => 20180138522 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-17 [patent_title] => LASER ABLATION OF WAVELENGTH TRANSPARENT MATERIAL WITH MATERIAL MODIFICATION [patent_app_type] => utility [patent_app_number] => 15/572115 [patent_app_country] => US [patent_app_date] => 2016-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4258 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15572115 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11307731 [patent_doc_number] => 09515138 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-12-06 [patent_title] => 'Structure and method to minimize junction capacitance in nano sheets' [patent_app_type] => utility [patent_app_number] => 15/149293 [patent_app_country] => US [patent_app_date] => 2016-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 4549 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15149293 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11050760 [patent_doc_number] => 20160247719 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-25 [patent_title] => 'Semiconductor Devices And Fabrication Methods With Improved Word Line Resistance and Reduced Salicide Bridge Formation' [patent_app_type] => utility [patent_app_number] => 15/146187 [patent_app_country] => US [patent_app_date] => 2016-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5036 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15146187 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13500159 [patent_doc_number] => 20180301622 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-18 [patent_title] => METHOD OF CLEANING AND METHOD OF PLASMA PROCESSING [patent_app_type] => utility [patent_app_number] => 15/566384 [patent_app_country] => US [patent_app_date] => 2016-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6390 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15566384 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12711904 [patent_doc_number] => 20180129134 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-10 [patent_title] => PRODUCTION PROCESS FOR SOLDER ELECTRODE AND USE THEREOF [patent_app_type] => utility [patent_app_number] => 15/572163 [patent_app_country] => US [patent_app_date] => 2016-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6477 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 15 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15572163 [rel_patent_id] =>[rel_patent_doc_number] =>)