Search

Brian Turner

Examiner (ID: 2043, Phone: (571)270-5411 , Office: P/2894 )

Most Active Art Unit
2894
Art Unit(s)
2894, 2818
Total Applications
877
Issued Applications
648
Pending Applications
113
Abandoned Applications
131

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11770435 [patent_doc_number] => 09379132 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-06-28 [patent_title] => 'NAND memory strings and methods of fabrication thereof' [patent_app_type] => utility [patent_app_number] => 14/523287 [patent_app_country] => US [patent_app_date] => 2014-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 27 [patent_no_of_words] => 9453 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 276 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14523287 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/523287
NAND memory strings and methods of fabrication thereof Oct 23, 2014 Issued
Array ( [id] => 10229696 [patent_doc_number] => 20150114690 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-04-30 [patent_title] => 'FLEX-RIGID WIRING BOARD AND METHOD FOR MANUFACTURING FLEX-RIGID WIRING BOARD' [patent_app_type] => utility [patent_app_number] => 14/522768 [patent_app_country] => US [patent_app_date] => 2014-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4928 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14522768 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/522768
FLEX-RIGID WIRING BOARD AND METHOD FOR MANUFACTURING FLEX-RIGID WIRING BOARD Oct 23, 2014 Abandoned
Array ( [id] => 10772340 [patent_doc_number] => 20160118496 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-04-28 [patent_title] => 'SEMICONDUCTOR STRUCTURES WITH FIELD EFFECT TRANSISTOR(S) HAVING LOW-RESISTANCE SOURCE/DRAIN CONTACT(S)' [patent_app_type] => utility [patent_app_number] => 14/523083 [patent_app_country] => US [patent_app_date] => 2014-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 14781 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14523083 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/523083
Semiconductor structures with field effect transistor(s) having low-resistance source/drain contact(s) Oct 23, 2014 Issued
Array ( [id] => 10229695 [patent_doc_number] => 20150114689 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-04-30 [patent_title] => 'FLEX-RIGID WIRING BOARD AND METHOD FOR MANUFACTURING FLEX-RIGID WIRING BOARD' [patent_app_type] => utility [patent_app_number] => 14/522742 [patent_app_country] => US [patent_app_date] => 2014-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4821 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14522742 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/522742
Flex-rigid wiring board and method for manufacturing flex-rigid wiring board Oct 23, 2014 Issued
Array ( [id] => 10772179 [patent_doc_number] => 20160118335 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-04-28 [patent_title] => 'TWO STEP METALLIZATION FORMATION' [patent_app_type] => utility [patent_app_number] => 14/523256 [patent_app_country] => US [patent_app_date] => 2014-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 5573 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14523256 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/523256
Two step metallization formation Oct 23, 2014 Issued
Array ( [id] => 10486993 [patent_doc_number] => 20150372013 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-24 [patent_title] => 'ARRAY SUBSTRATE, MANUFACTURING METHOD THEREOF, AND DISPLAY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/522651 [patent_app_country] => US [patent_app_date] => 2014-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5786 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14522651 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/522651
Array substrate, manufacturing method thereof, and display device Oct 23, 2014 Issued
Array ( [id] => 10486993 [patent_doc_number] => 20150372013 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-24 [patent_title] => 'ARRAY SUBSTRATE, MANUFACTURING METHOD THEREOF, AND DISPLAY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/522651 [patent_app_country] => US [patent_app_date] => 2014-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5786 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14522651 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/522651
Array substrate, manufacturing method thereof, and display device Oct 23, 2014 Issued
Array ( [id] => 10486993 [patent_doc_number] => 20150372013 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-24 [patent_title] => 'ARRAY SUBSTRATE, MANUFACTURING METHOD THEREOF, AND DISPLAY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/522651 [patent_app_country] => US [patent_app_date] => 2014-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5786 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14522651 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/522651
Array substrate, manufacturing method thereof, and display device Oct 23, 2014 Issued
Array ( [id] => 13242783 [patent_doc_number] => 10134598 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-11-20 [patent_title] => Method for manufacturing semiconductor device [patent_app_type] => utility [patent_app_number] => 15/321245 [patent_app_country] => US [patent_app_date] => 2014-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 3234 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15321245 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/321245
Method for manufacturing semiconductor device Oct 9, 2014 Issued
Array ( [id] => 13335085 [patent_doc_number] => 20180219080 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-02 [patent_title] => SELECTIVE GATE SPACERS FOR SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 15/506101 [patent_app_country] => US [patent_app_date] => 2014-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13024 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15506101 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/506101
Selective gate spacers for semiconductor devices Sep 25, 2014 Issued
Array ( [id] => 11623365 [patent_doc_number] => 20170133553 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-05-11 [patent_title] => 'LIGHT EMITTING DIODE AND MANUFACTURING METHOD THEREFOR' [patent_app_type] => utility [patent_app_number] => 15/128684 [patent_app_country] => US [patent_app_date] => 2014-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10090 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15128684 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/128684
Light emitting diode and manufacturing method therefor Sep 15, 2014 Issued
Array ( [id] => 11782060 [patent_doc_number] => 09391269 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-07-12 [patent_title] => 'Variable resistance memory devices' [patent_app_type] => utility [patent_app_number] => 14/457439 [patent_app_country] => US [patent_app_date] => 2014-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 52 [patent_figures_cnt] => 71 [patent_no_of_words] => 17958 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14457439 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/457439
Variable resistance memory devices Aug 11, 2014 Issued
Array ( [id] => 10703223 [patent_doc_number] => 20160049370 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-02-18 [patent_title] => 'METHODS OF FORMING MIS CONTACT STRUCTURES FOR SEMICONDUCTOR DEVICES BY SELECTIVE DEPOSITION OF INSULATING MATERIAL AND THE RESULTING DEVICES' [patent_app_type] => utility [patent_app_number] => 14/457370 [patent_app_country] => US [patent_app_date] => 2014-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3999 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14457370 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/457370
METHODS OF FORMING MIS CONTACT STRUCTURES FOR SEMICONDUCTOR DEVICES BY SELECTIVE DEPOSITION OF INSULATING MATERIAL AND THE RESULTING DEVICES Aug 11, 2014 Abandoned
Array ( [id] => 10343569 [patent_doc_number] => 20150228573 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-13 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/457185 [patent_app_country] => US [patent_app_date] => 2014-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 15442 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14457185 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/457185
Semiconductor device Aug 11, 2014 Issued
Array ( [id] => 10700340 [patent_doc_number] => 20160046486 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-02-18 [patent_title] => 'SYSTEM, APPARATUS, AND METHOD TO MECHANICALLY AND CHEMICALLY CONVERT THE ELEMENT SILICON IN A WATER SPLIT REACTION' [patent_app_type] => utility [patent_app_number] => 14/457211 [patent_app_country] => US [patent_app_date] => 2014-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2739 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14457211 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/457211
SYSTEM, APPARATUS, AND METHOD TO MECHANICALLY AND CHEMICALLY CONVERT THE ELEMENT SILICON IN A WATER SPLIT REACTION Aug 11, 2014 Abandoned
Array ( [id] => 10703185 [patent_doc_number] => 20160049332 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-02-18 [patent_title] => 'METHODS OF FORMING CONTACT STRUCTURES FOR SEMICONDUCTOR DEVICES AND THE RESULTING DEVICES' [patent_app_type] => utility [patent_app_number] => 14/457708 [patent_app_country] => US [patent_app_date] => 2014-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5012 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14457708 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/457708
Methods of forming contact structures for semiconductor devices and the resulting devices Aug 11, 2014 Issued
Array ( [id] => 14061117 [patent_doc_number] => 10234851 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-03-19 [patent_title] => Method for the controlled changeover of a treatment machine [patent_app_type] => utility [patent_app_number] => 14/913510 [patent_app_country] => US [patent_app_date] => 2014-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3679 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 268 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14913510 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/913510
Method for the controlled changeover of a treatment machine Jul 24, 2014 Issued
Array ( [id] => 10674150 [patent_doc_number] => 20160020295 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-21 [patent_title] => 'Semiconductor Devices and Fabrication Methods With Improved Word Line Resistance And Reduced Salicide Bridge Formation' [patent_app_type] => utility [patent_app_number] => 14/334325 [patent_app_country] => US [patent_app_date] => 2014-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5037 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14334325 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/334325
Semiconductor Devices and Fabrication Methods With Improved Word Line Resistance And Reduced Salicide Bridge Formation Jul 16, 2014 Abandoned
Array ( [id] => 10673998 [patent_doc_number] => 20160020143 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-21 [patent_title] => 'Semiconductor Devices and Fabrication Methods With Reduced Topology And Reduced Word Line Stringer Residual Material' [patent_app_type] => utility [patent_app_number] => 14/334363 [patent_app_country] => US [patent_app_date] => 2014-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 5629 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14334363 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/334363
Semiconductor Devices and Fabrication Methods With Reduced Topology And Reduced Word Line Stringer Residual Material Jul 16, 2014 Abandoned
Array ( [id] => 10674066 [patent_doc_number] => 20160020211 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-21 [patent_title] => 'Composite Hard Mask Etching Profile for Preventing Pattern Collapse in High-Aspect-Ratio Trenches' [patent_app_type] => utility [patent_app_number] => 14/333802 [patent_app_country] => US [patent_app_date] => 2014-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4050 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14333802 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/333802
Composite hard mask etching profile for preventing pattern collapse in high-aspect-ratio trenches Jul 16, 2014 Issued
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