Search

Brian Turner

Examiner (ID: 2043, Phone: (571)270-5411 , Office: P/2894 )

Most Active Art Unit
2894
Art Unit(s)
2894, 2818
Total Applications
877
Issued Applications
648
Pending Applications
113
Abandoned Applications
131

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10674070 [patent_doc_number] => 20160020216 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-21 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THEREOF USING A FLOWABLE MATERIAL DURING THE CONTROL GATE REMOVAL FOR WORD LINE END FORMATION' [patent_app_type] => utility [patent_app_number] => 14/333893 [patent_app_country] => US [patent_app_date] => 2014-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4205 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14333893 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/333893
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THEREOF USING A FLOWABLE MATERIAL DURING THE CONTROL GATE REMOVAL FOR WORD LINE END FORMATION Jul 16, 2014 Abandoned
Array ( [id] => 11417526 [patent_doc_number] => 09564359 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-02-07 [patent_title] => 'Conductive structure and method of forming the same' [patent_app_type] => utility [patent_app_number] => 14/333961 [patent_app_country] => US [patent_app_date] => 2014-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 20 [patent_no_of_words] => 7506 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14333961 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/333961
Conductive structure and method of forming the same Jul 16, 2014 Issued
Array ( [id] => 10673953 [patent_doc_number] => 20160020098 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-21 [patent_title] => 'LITHOGRAPHY USING INTERFACE REACTION' [patent_app_type] => utility [patent_app_number] => 14/333544 [patent_app_country] => US [patent_app_date] => 2014-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3753 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14333544 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/333544
Lithography using interface reaction Jul 16, 2014 Issued
Array ( [id] => 11246593 [patent_doc_number] => 09472644 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-10-18 [patent_title] => 'Semiconductor device with air gap and method for fabricating the same' [patent_app_type] => utility [patent_app_number] => 14/334188 [patent_app_country] => US [patent_app_date] => 2014-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 25 [patent_no_of_words] => 7975 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14334188 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/334188
Semiconductor device with air gap and method for fabricating the same Jul 16, 2014 Issued
Array ( [id] => 11466741 [patent_doc_number] => 09583380 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-02-28 [patent_title] => 'Anisotropic material damage process for etching low-K dielectric materials' [patent_app_type] => utility [patent_app_number] => 14/334385 [patent_app_country] => US [patent_app_date] => 2014-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 3559 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14334385 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/334385
Anisotropic material damage process for etching low-K dielectric materials Jul 16, 2014 Issued
Array ( [id] => 11483360 [patent_doc_number] => 09589915 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-03-07 [patent_title] => 'Semiconductor device and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 14/333709 [patent_app_country] => US [patent_app_date] => 2014-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 44 [patent_figures_cnt] => 52 [patent_no_of_words] => 9340 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14333709 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/333709
Semiconductor device and manufacturing method thereof Jul 16, 2014 Issued
Array ( [id] => 10674027 [patent_doc_number] => 20160020172 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-21 [patent_title] => 'Anti-fuse on and/or in Package' [patent_app_type] => utility [patent_app_number] => 14/334217 [patent_app_country] => US [patent_app_date] => 2014-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 6051 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14334217 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/334217
Anti-fuse on and/or in package Jul 16, 2014 Issued
Array ( [id] => 10582213 [patent_doc_number] => 09304335 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-04-05 [patent_title] => 'Integrated LDMOS devices for silicon photonics' [patent_app_type] => utility [patent_app_number] => 14/332886 [patent_app_country] => US [patent_app_date] => 2014-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 6942 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14332886 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/332886
Integrated LDMOS devices for silicon photonics Jul 15, 2014 Issued
Array ( [id] => 10673974 [patent_doc_number] => 20160020119 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-21 [patent_title] => 'Method of Controlling Recess Depth and Bottom ECD in Over-Etching' [patent_app_type] => utility [patent_app_number] => 14/333113 [patent_app_country] => US [patent_app_date] => 2014-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4030 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14333113 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/333113
Method of Controlling Recess Depth and Bottom ECD in Over-Etching Jul 15, 2014 Abandoned
Array ( [id] => 10577152 [patent_doc_number] => 09299803 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-29 [patent_title] => 'Method for semiconductor device fabrication' [patent_app_type] => utility [patent_app_number] => 14/332581 [patent_app_country] => US [patent_app_date] => 2014-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 6233 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14332581 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/332581
Method for semiconductor device fabrication Jul 15, 2014 Issued
Array ( [id] => 10315028 [patent_doc_number] => 20150200031 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-16 [patent_title] => 'METHOD OF FABRICATING NANOWIRE AND GRAPHENE-SHEET HYBRID STRUCTURE AND TRANSPARENT ELECTRODE USING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/333002 [patent_app_country] => US [patent_app_date] => 2014-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3873 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14333002 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/333002
METHOD OF FABRICATING NANOWIRE AND GRAPHENE-SHEET HYBRID STRUCTURE AND TRANSPARENT ELECTRODE USING THE SAME Jul 15, 2014 Abandoned
Array ( [id] => 11180586 [patent_doc_number] => 09412581 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-08-09 [patent_title] => 'Low-K dielectric gapfill by flowable deposition' [patent_app_type] => utility [patent_app_number] => 14/333262 [patent_app_country] => US [patent_app_date] => 2014-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9382 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 322 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14333262 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/333262
Low-K dielectric gapfill by flowable deposition Jul 15, 2014 Issued
Array ( [id] => 10926368 [patent_doc_number] => 20140329389 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-11-06 [patent_title] => 'BULK NANO-RIBBON AND/OR NANO-POROUS STRUCTURES FOR THERMOELECTRIC DEVICES AND METHODS FOR MAKING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/333197 [patent_app_country] => US [patent_app_date] => 2014-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 14494 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14333197 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/333197
Bulk nano-ribbon and/or nano-porous structures for thermoelectric devices and methods for making the same Jul 15, 2014 Issued
Array ( [id] => 10916432 [patent_doc_number] => 20140319451 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-10-30 [patent_title] => 'MEMORY CELL ARRAY AND VARIABLE RESISTIVE MEMORY DEVICE INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/328382 [patent_app_country] => US [patent_app_date] => 2014-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3728 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14328382 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/328382
Memory cell array and variable resistive memory device including the same Jul 9, 2014 Issued
Array ( [id] => 11215004 [patent_doc_number] => 09444046 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-09-13 [patent_title] => 'Three dimensional memory array architecture' [patent_app_type] => utility [patent_app_number] => 14/268649 [patent_app_country] => US [patent_app_date] => 2014-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 19 [patent_no_of_words] => 17312 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14268649 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/268649
Three dimensional memory array architecture May 1, 2014 Issued
Array ( [id] => 14488055 [patent_doc_number] => 10330809 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-25 [patent_title] => Device and method for optimization of 4D and 3D seismic data [patent_app_type] => utility [patent_app_number] => 14/888168 [patent_app_country] => US [patent_app_date] => 2014-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5010 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14888168 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/888168
Device and method for optimization of 4D and 3D seismic data Apr 29, 2014 Issued
Array ( [id] => 10916517 [patent_doc_number] => 20140319535 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-10-30 [patent_title] => 'NITRIDE SEMICONDUCTOR SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 14/258181 [patent_app_country] => US [patent_app_date] => 2014-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 5647 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14258181 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/258181
Nitride semiconductor substrate Apr 21, 2014 Issued
Array ( [id] => 10916521 [patent_doc_number] => 20140319540 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-10-30 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/258251 [patent_app_country] => US [patent_app_date] => 2014-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7805 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14258251 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/258251
Semiconductor device Apr 21, 2014 Issued
Array ( [id] => 11805938 [patent_doc_number] => 09546995 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-01-17 [patent_title] => 'Nanopore device including graphene nanopore and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 14/257654 [patent_app_country] => US [patent_app_date] => 2014-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 15 [patent_no_of_words] => 4768 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14257654 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/257654
Nanopore device including graphene nanopore and method of manufacturing the same Apr 20, 2014 Issued
Array ( [id] => 11333848 [patent_doc_number] => 09525101 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-12-20 [patent_title] => 'Optoelectronic device' [patent_app_type] => utility [patent_app_number] => 14/257716 [patent_app_country] => US [patent_app_date] => 2014-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3528 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14257716 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/257716
Optoelectronic device Apr 20, 2014 Issued
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